bindings/arm/psci.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15   processors") can be used by Linux to initiate various CPU-centric power
25      r0       => 32-bit Function ID / return value
26     {r1 - r3}	=> Parameters
40       - description:
44       - description:
52           - const: arm,psci-0.2
53           - const: arm,psci
55       - description:
61           - const: arm,psci-1.0
62           - const: arm,psci-0.2
63           - const: arm,psci
67     $ref: /schemas/types.yaml#/definitions/string-array
69       - smc
71       - hvc
89   arm,psci-suspend-param:
95       idle state nodes with entry-method property is set to "psci", as per
98       [1] Kernel documentation - ARM idle states bindings
99         Documentation/devicetree/bindings/cpu/idle-states.yaml
102   "^power-domain-":
103     $ref: /schemas/power/power-domain.yaml#
110       own specific power states and can be better represented hierarchically.
112       For these cases, the definitions of the idle states for the CPUs and the
113       CPU topology, must conform to the binding in [3]. The idle states
115       arm,psci-suspend-param property.
117       It should also be noted that, in PSCI firmware v1.0 the OS-Initiated
122       [3] Documentation/devicetree/bindings/power/power-domain.yaml
123       [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml
126   - compatible
127   - method
130   - if:
137         - cpu_off
138         - cpu_on
143   - |+
156   - |+
161       compatible      = "arm,psci-0.2";
166   - |+
178       compatible = "arm,psci-0.2", "arm,psci";
185   - |+
187     // Case 4: CPUs and CPU idle states described using the hierarchical model.
190       #size-cells = <0>;
191       #address-cells = <1>;
195         compatible = "arm,cortex-a53";
197         enable-method = "psci";
198         power-domains = <&CPU_PD0>;
199         power-domain-names = "psci";
204         compatible = "arm,cortex-a53";
206         enable-method = "psci";
207         power-domains = <&CPU_PD1>;
208         power-domain-names = "psci";
211       idle-states {
213         CPU_PWRDN: cpu-power-down {
214           compatible = "arm,idle-state";
215           arm,psci-suspend-param = <0x0000001>;
216           entry-latency-us = <10>;
217           exit-latency-us = <10>;
218           min-residency-us = <100>;
222       domain-idle-states {
224         CLUSTER_RET: cluster-retention {
225           compatible = "domain-idle-state";
226           arm,psci-suspend-param = <0x1000011>;
227           entry-latency-us = <500>;
228           exit-latency-us = <500>;
229           min-residency-us = <2000>;
232         CLUSTER_PWRDN: cluster-power-down {
233           compatible = "domain-idle-state";
234           arm,psci-suspend-param = <0x1000031>;
235           entry-latency-us = <2000>;
236           exit-latency-us = <2000>;
237           min-residency-us = <6000>;
243       compatible = "arm,psci-1.0";
246       CPU_PD0: power-domain-cpu0 {
247         #power-domain-cells = <0>;
248         domain-idle-states = <&CPU_PWRDN>;
249         power-domains = <&CLUSTER_PD>;
252       CPU_PD1: power-domain-cpu1 {
253         #power-domain-cells = <0>;
254         domain-idle-states =  <&CPU_PWRDN>;
255         power-domains = <&CLUSTER_PD>;
258       CLUSTER_PD: power-domain-cluster {
259         #power-domain-cells = <0>;
260         domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;