Lines Matching +full:syscon +full:- +full:clk

8 - compatible: Should be one of:
9 	- "mediatek,mt2701-vdecsys", "syscon"
10 	- "mediatek,mt2712-vdecsys", "syscon"
11 	- "mediatek,mt6779-vdecsys", "syscon"
12 	- "mediatek,mt6797-vdecsys", "syscon"
13 	- "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
14 	- "mediatek,mt8167-vdecsys", "syscon"
15 	- "mediatek,mt8173-vdecsys", "syscon"
16 	- "mediatek,mt8183-vdecsys", "syscon"
17 - #clock-cells: Must be 1
19 The vdecsys controller uses the common clk binding from
20 Documentation/devicetree/bindings/clock/clock-bindings.txt
21 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
25 vdecsys: clock-controller@16000000 {
26 	compatible = "mediatek,mt8173-vdecsys", "syscon";
28 	#clock-cells = <1>;