Lines Matching +full:mt8195 +full:- +full:power
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
18 pattern: "^syscon@[0-9a-f]+$"
22 - items:
23 - enum:
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6795-mmsys
29 - mediatek,mt6797-mmsys
30 - mediatek,mt8167-mmsys
31 - mediatek,mt8173-mmsys
32 - mediatek,mt8183-mmsys
33 - mediatek,mt8186-mmsys
34 - mediatek,mt8188-vdosys0
35 - mediatek,mt8192-mmsys
36 - mediatek,mt8195-vdosys1
37 - mediatek,mt8195-vppsys0
38 - mediatek,mt8195-vppsys1
39 - mediatek,mt8365-mmsys
40 - const: syscon
42 - description: vdosys0 and vdosys1 are 2 display HW pipelines,
43 so mt8195 binding should be deprecated.
46 - const: mediatek,mt8195-mmsys
47 - const: syscon
49 - items:
50 - const: mediatek,mt7623-mmsys
51 - const: mediatek,mt2701-mmsys
52 - const: syscon
54 - items:
55 - const: mediatek,mt8195-vdosys0
56 - const: mediatek,mt8195-mmsys
57 - const: syscon
62 power-domains:
65 of the power controller specified by phandle. See
66 Documentation/devicetree/bindings/power/power-domain.yaml for details.
72 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
74 $ref: /schemas/types.yaml#/definitions/phandle-array
76 mediatek,gce-client-reg:
83 include/dt-bindings/gce/<chip>-gce.h.
84 $ref: /schemas/types.yaml#/definitions/phandle-array
87 "#clock-cells":
90 '#reset-cells':
94 - compatible
95 - reg
96 - "#clock-cells"
101 - |
102 #include <dt-bindings/power/mt8173-power.h>
103 #include <dt-bindings/gce/mt8173-gce.h>
106 compatible = "mediatek,mt8173-mmsys", "syscon";
108 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
109 #clock-cells = <1>;
110 #reset-cells = <1>;
113 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;