hisilicon/controller/cpuctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Wei Xu <xuwei5@hisilicon.com>
13   The clock registers and power registers of secondary cores are defined
14   in CPU controller, especially in HIX5HD2 SoC.
19       - const: hisilicon,cpuctrl
24   "#address-cells":
27   "#size-cells":
33   "^clock@[0-9a-f]+$":
39         const: hisilicon,hix5hd2-clock
44       "#clock-cells":
48       - compatible
49       - reg
50       - "#clock-cells"
53   - compatible
54   - reg
60   - |
63         #address-cells = <1>;
64         #size-cells = <1>;
68         clock: clock@0 {
69             compatible = "hisilicon,hix5hd2-clock";
71             #clock-cells = <1>;