bindings/arm/arm%2Cvexpress-juno.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Sudeep Holla <sudeep.holla@arm.com>
11   - Linus Walleij <linus.walleij@linaro.org>
15   multicore Cortex-A class systems. The Versatile Express family contains both
18   The board consist of a motherboard and one or more daughterboards (tiles). The
19   motherboard provides a set of peripherals. Processor and RAM "live" on the
22   The motherboard and each core tile should be described by a separate Device
28   When a new generation of boards were introduced under the name "Juno", these
34   is a daughterboard to the main motherboard. The name used in the compatible
37   further subvariants are released of the core tile, even more fine-granular
45       - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
46           in MPCore configuration in a test chip on the core tile. See ARM
49           - const: arm,vexpress,v2p-ca9
50           - const: arm,vexpress
51       - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
52           in a test chip on the core tile. It is intended to evaluate NEON, FPU
53           and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
55           - const: arm,vexpress,v2p-ca5s
56           - const: arm,vexpress
57       - description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
58           cores in a MPCore configuration in a test chip on the core tile. See
61           - const: arm,vexpress,v2p-ca15
62           - const: arm,vexpress
63       - description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex
64           A15 CPU cores in a test chip on the core tile. This is the first test
67           - const: arm,vexpress,v2p-ca15,tc1
68           - const: arm,vexpress,v2p-ca15
69           - const: arm,vexpress
70       - description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
71           CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
72           in a test chip on the core tile. See ARM DDI 0503I.
74           - const: arm,vexpress,v2p-ca15_a7
75           - const: arm,vexpress
76       - description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU
77           cores in a test chip on the core tile. See ARM DDI 0498D.
79           - const: arm,vexpress,v2f-1xv7,ca53x2
80           - const: arm,vexpress,v2f-1xv7
81           - const: arm,vexpress
82       - description: Arm Versatile Express Juno "r0" (the first Juno board,
83           V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
84           AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
85           cores in a big.LITTLE configuration. It also features the MALI T624
88           - const: arm,juno
89           - const: arm,vexpress
90       - description: Arm Versatile Express Juno r1 Development Platform
91           (V2M-Juno r1) was introduced mainly aimed at development of PCIe
96           - const: arm,juno-r1
97           - const: arm,juno
98           - const: arm,vexpress
99       - description: Arm Versatile Express Juno r2 Development Platform
100           (V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
103           - const: arm,juno-r2
104           - const: arm,juno
105           - const: arm,vexpress
106       - description: Arm AEMv8a Versatile Express Real-Time System Model
107           (VE RTSM) is a programmers view of the Versatile Express with Arm
110           - const: arm,rtsm_ve,aemv8a
111           - const: arm,vexpress
112       - description: Arm FVP (Fixed Virtual Platform) base model revision C
115           - const: arm,fvp-base-revc
116           - const: arm,vexpress
117       - description: Arm Foundation model for Aarch64
119           - const: arm,foundation-aarch64
120           - const: arm,vexpress
137   "^bus@[0-9a-f]+$":
141       in a subnode named "motherboard-bus". Sometimes the compatible includes
142       "arm,vexpress,v2?-p1" sometimes (on software models) is is just
143       "simple-bus". If the compatible is placed in the "motherboard-bus" node,
146     $ref: /schemas/simple-bus.yaml
152           - items:
153               - enum:
154                   - arm,vexpress,v2m-p1
155                   - arm,vexpress,v2p-p1
156               - const: simple-bus
157           - const: simple-bus
160       '^motherboard-bus@':
162         description: The motherboard description provides a single "motherboard"
169           "#address-cells":
171           "#size-cells":
177               - enum:
178                   - arm,vexpress,v2m-p1
179                   - arm,vexpress,v2p-p1
180               - const: simple-bus
181           arm,v2m-memory-map:
185               - rs1
186               - rs2
205           - compatible
211       - compatible
214   - if:
219               - arm,vexpress,v2p-ca9
220               - arm,vexpress,v2p-ca5s
221               - arm,vexpress,v2p-ca15
222               - arm,vexpress,v2p-ca15_a7
223               - arm,vexpress,v2f-1xv7,ca53x2
226         - arm,hbi