arch/arm64/cpu-feature-registers.rst

15 The ARM architecture defines a set of feature registers, which describe
22  a) Any change to the HWCAPs requires an update to userspace (e.g libc)
23     to detect the new changes, which can take a long time to appear in
31     architecture defines a canonical format for representing features
39  a) Safety:
43     implications on a system with heterogeneous CPUs.
44     The infrastructure exports a value that is safe across all the
70     MIDR_EL1 is exposed to help identify the processor. On a
88 Accessing a restricted system register from an application generates an
104  a) The value of an 'IMPLEMENTATION DEFINED' field is set to 0.
105  b) The value of a reserved field is populated with the reserved
107  c) The value of a 'visible' field holds the system wide safe value
205    as available on the CPU where it is fetched and is not a system