Lines Matching full:b1

221     - SCR_EL3.HCE (bit 8) must be initialised to 0b1.
226       - ICC_SRE_EL3.Enable (bit 3) must be initialised to 0b1.
227       - ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1.
234       - ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1
235       - ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.
256     - SCR_EL3.APK (bit 16) must be initialised to 0b1
257     - SCR_EL3.API (bit 17) must be initialised to 0b1
261     - HCR_EL2.APK (bit 40) must be initialised to 0b1
262     - HCR_EL2.API (bit 41) must be initialised to 0b1
272       having 0b1 set for the corresponding bit for each of the auxiliary
279       having 0b1 set for the corresponding bit for each of the auxiliary
286     - SCR_EL3.FGTEn (bit 27) must be initialised to 0b1.
292     - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.
308     - CPTR_EL3.EZ (bit 8) must be initialised to 0b1.
326     - CPTR_EL3.ESM (bit 12) must be initialised to 0b1.
328     - SCR_EL3.EnTP2 (bit 41) must be initialised to 0b1.
339     - SCTLR_EL2.EnTP2 (bit 60) must be initialised to 0b1.
356     - SMCR_EL3.FA64 (bit 31) must be initialised to 0b1.
360     - SMCR_EL2.FA64 (bit 31) must be initialised to 0b1.
366     - SCR_EL3.ATA (bit 26) must be initialised to 0b1.
370     - HCR_EL2.ATA (bit 56) must be initialised to 0b1.
376     - SMCR_EL3.EZT0 (bit 30) must be initialised to 0b1.
380     - SMCR_EL2.EZT0 (bit 30) must be initialised to 0b1.
386     - HCRX_EL2.MSCEn (bit 11) must be initialised to 0b1.
392     - SCR_EL3.TCR2En (bit 43) must be initialised to 0b1.
396     - HCRX_EL2.TCR2En (bit 14) must be initialised to 0b1.
402     - SCR_EL3.PIEn (bit 45) must be initialised to 0b1.
406     - HFGRTR_EL2.nPIR_EL1 (bit 58) must be initialised to 0b1.
408     - HFGWTR_EL2.nPIR_EL1 (bit 58) must be initialised to 0b1.
410     - HFGRTR_EL2.nPIRE0_EL1 (bit 57) must be initialised to 0b1.
412     - HFGRWR_EL2.nPIRE0_EL1 (bit 57) must be initialised to 0b1.