arm/stm32/stm32-dma-mdma-chaining.rst

4 STM32 DMA-MDMA chaining
11   This document describes the STM32 DMA-MDMA chaining feature. But before going
17   STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA
33   **STM32 MDMA**
35   STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between
38   interfaces for AHB peripherals, while the STM32 MDMA acts as a second level
39   DMA with better performance. As a AXI/AHB master, STM32 MDMA can take control
46   STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and
47   STM32 MDMA controllers.
52   counter is automatically reloaded. This allows the SW or the STM32 MDMA to
56   With STM32 MDMA linked-list mode, a single request initiates the data array
60   case, the linked-list loops on to create a circular MDMA transfer.
62   STM32 MDMA has direct connections with STM32 DMA. This enables autonomous
65   can triggers STM32 MDMA transfer. STM32 MDMA can clear the request generated
69   .. table:: STM32 MDMA interconnect table with STM32 DMA
72     | STM32 DMAMUX | STM32 DMA      | STM32 DMA | STM32 MDMA |
110   STM32 DMA-MDMA chaining feature then uses a SRAM buffer. STM32MP1 SoCs embed
114   between STM32 DMA and STM32 MDMA. This buffer is split in two equal periods
115   and STM32 DMA uses one period while STM32 MDMA uses the other period
122     | STM32 DMA  |    /  __|>_  \    | STM32 MDMA |
128   STM32 DMA-MDMA chaining uses (struct dma_slave_config).peripheral_config to
129   exchange the parameters needed to configure MDMA. These parameters are
132   * the STM32 MDMA request (which is actually the DMAMUX channel ID),
137 Device Tree updates for STM32 DMA-MDMA chaining support
154     STM32 DMA and STM32 MDMA can work simultaneously, on each buffer of the
157     and STM32 MDMA will work sequentially instead of simultaneously. It is not a
171   **2. Allocate a STM32 DMA channel and a STM32 MDMA channel**
176     This new channel must be taken from STM32 MDMA channels, so, the phandle of
177     the DMA controller to use is the MDMA controller's one.
184                          <&mdma1 0 0x3 0x1200000a 0 0>; // + STM32 MDMA channel
187     Concerning STM32 MDMA bindings:
190     by MDMA driver with the STM32 DMAMUX channel ID passed through
201     request: it will be overwritten by MDMA driver, with the DMA channel
206     request: it will be overwritten by MDMA driver, with the DMA channel
210 Driver updates for STM32 DMA-MDMA chaining support in foo driver
218     of DDR buffer) and one for STM32 MDMA transfer (where memory address targets
263       /* Create sg table for STM32 MDMA channel */
266               dev_err(dev, "MDMA sg_table alloc failed\n");
305     configure STM32 MDMA channel. Take care of DMA addresses, the device address
311     struct dma_slave_config to configure STM32 MDMA channel.
342   **3. Get a descriptor for STM32 MDMA channel transaction**
347       STM32 MDMA;
349       STM32 MDMA.
364     * DMA_DEV_TO_MEM: set the callback on the "MDMA" descriptor
371   As STM32 MDMA channel transfer is triggered by STM32 DMA, you must issue
372   STM32 MDMA channel before STM32 DMA channel.
379   it. STM32 MDMA channel will be stopped by HW in case of sg transfer, but not
382   **STM32 DMA-MDMA chaining DMA_MEM_TO_DEV special case**
384   STM32 DMA-MDMA chaining in DMA_MEM_TO_DEV is a special case. Indeed, the
385   STM32 MDMA feeds the SRAM buffer with the DDR data, and the STM32 DMA reads
390   Complete signal, triggering the STM32 MDMA channel), but the first data read
395   Due to this complexity, rather use the STM32 DMA-MDMA chaining for
406   dealing with STM32 DMAMUX, STM32 DMA and STM32 MDMA.