openbmc/intel-ipmi-oem/ipmi-allowlist.conf

8 0x00:0x06:0x7f7f   //<Chassis>:<Set Power Restore Policy>
34 0x04:0x2a:0x7f7f   //<Sensor/Event>:<Re-arm Sensor Events>
44 0x06:0x06:0xffff   //<App>:<Set ACPI Power State>
45 0x06:0x07:0xffff   //<App>:<Get ACPI Power State>
174 0x2e:0xCB:0x7f7f   //<Intel OEM>:<Set Node Manager Power Draw Range>
177 0x2e:0xD0:0x7f7f   //<Intel OEM>:<Set Total Power Budget>
178 0x2e:0xD1:0xff7f   //<Intel OEM>:<Get Total Power Budget>
179 0x2e:0xD2:0x7f7f   //<Intel OEM>:<Set Max Allowed CPU P-state/Threads>
180 0x2e:0xD3:0xff7f   //<Intel OEM>:<Get Max Allowed CPU P-state/Threads>
181 0x2e:0xD4:0xff7f   //<Intel OEM>:<Get Number of P-states/Threads>
226 0x30:0x54:0x7f7f   //<Intel General Application>:<Set Power Restore Delay>
227 0x30:0x55:0xff7f   //<Intel General Application>:<Get Power Restore Delay>
244 0x30:0x81:0xff7f   //<Intel General Application>:<Get Power State>
248 0x30:0x88:0x7f7f   //<Intel General Application>:<Fans-off Configuration>
314 0x32:0x8d:0xff7f   //<Intel OEM Platform>:<Get SSD Power>
315 0x32:0x90:0x7f7f   //<Intel OEM Platform>:<Get-Set Serial Port Speed>
317 0x3e:0x02:0xff7f   //<Intel Managed Data Region>:<BMC Data Region Update Event Message>
318 0x3e:0x20:0x7f7f   //<Intel Managed Data Region>:<BMC Region Status>
319 0x3e:0x21:0x7f7f   //<Intel Managed Data Region>:<BMC Region Update Complete>
320 0x3e:0x22:0xff7f   //<Intel Managed Data Region>:<MDR Event>
321 0x3e:0x23:0xff7f   //<Intel Managed Data Region>:<BMC Region Read>
322 0x3e:0x24:0x7f7f   //<Intel Managed Data Region>:<BMC Region Write>
323 0x3e:0x25:0x7f7f   //<Intel Managed Data Region>:<BMC Region Lock>
324 0x3e:0x28:0xff7f   //<Intel Managed Data Region>:<Get DIMM information>
325 0x3e:0x30:0xff7f   //<Intel Managed Data Region>:<MDR2 Status>
326 0x3e:0x31:0xff7f   //<Intel Managed Data Region>:<MDR2 GET Direction>
327 0x3e:0x32:0xff7f   //<Intel Managed Data Region>:<MDR2 Get Data Set Info>
328 0x3e:0x33:0xff7f   //<Intel Managed Data Region>:<MDR2 Lock Data>
329 0x3e:0x34:0xff7f   //<Intel Managed Data Region>:<MDR2 Unlock Data>
330 0x3e:0x35:0xff7f   //<Intel Managed Data Region>:<MDR2 Dget Data Block>
331 0x3e:0x38:0xff7f   //<Intel Managed Data Region>:<MDR2 Send Direction>
332 0x3e:0x39:0xff7f   //<Intel Managed Data Region>:<MDR2 Data Info Offer>
333 0x3e:0x3a:0x7f7f   //<Intel Managed Data Region>:<MDR2 Data Info>
334 0x3e:0x3b:0x7f7f   //<Intel Managed Data Region>:<MDR2 Data Start>
335 0x3e:0x3c:0x7f7f   //<Intel Managed Data Region>:<MDR2 Data Done>
336 0x3e:0x3d:0x7f7f   //<Intel Managed Data Region>:<MDR2 Data Block>
337 0x3e:0x40:0x7f7f   //<Intel Managed Data Region>:<Set Get LAN Failover>
338 0x3e:0x41:0xff7f   //<Intel Managed Data Region>:<Enter Platform Debug Log file transfer mode>
339 0x3e:0x42:0xff7f   //<Intel Managed Data Region>:<Read Platform Debug Log file>
340 0x3e:0x43:0xff7f   //<Intel Managed Data Region>:<Status of the Platform Debug Log file transfer mo…
341 0x3e:0x44:0xff7f   //<Intel Managed Data Region>:<Exit Platform Debug Log file transfer mode>
342 0x3e:0x47:0x7f7f   //<Intel Managed Data Region>:<Get/Set BMC Application Fault Management Config>
343 0x3e:0x48:0x7f7f   //<Intel Managed Data Region>:<Get/Set BMC Boot Fault Management Config>
344 0x3e:0x50:0xff7f   //<Intel Managed Data Region>:<Node IPMB target address>
345 0x3e:0x51:0xff7f   //<Intel Managed Data Region>:<Slot IPMB>
346 0x3e:0x52:0xff7f   //<Intel Managed Data Region>:<Slot I2C Controller Write Read>
347 0x3e:0x70:0x7f7f   //<Intel Managed Data Region>:<SDR Configuration File control>
348 0x3e:0x71:0x7f7f   //<Intel Managed Data Region>:<SDR Configuration File Write>
349 0x3e:0x72:0x7f7f   //<Intel Managed Data Region>:<SDR Configuration File Read>
350 0x3e:0x73:0x7f7f   //<Intel Managed Data Region>:<SDR Configuration File Management>
351 0x3e:0x75:0xff7f   //<Intel Managed Data Region>:<Get Remote Log IP>
352 0x3e:0x76:0x7f7f   //<Intel Managed Data Region>:<Get/Set Password Mode>
353 0x3e:0x84:0x7f7f   //<Intel Managed Data Region>:<Read PFR Mailbox>