Lines Matching refs:pBank
2257 const auto* pBank = reinterpret_cast<const CrdMcaBank*>(data.data()); in handleMcaBank() local
2260 ss << std::format(" MCA_CTRL : 0x{:016X}\n", pBank->mcaCtrl); in handleMcaBank()
2261 ss << std::format(" MCA_STATUS : 0x{:016X}\n", pBank->mcaSts); in handleMcaBank()
2262 ss << std::format(" MCA_ADDR : 0x{:016X}\n", pBank->mcaAddr); in handleMcaBank()
2263 ss << std::format(" MCA_MISC0 : 0x{:016X}\n", pBank->mcaMisc0); in handleMcaBank()
2264 ss << std::format(" MCA_CTRL_MASK : 0x{:016X}\n", pBank->mcaCtrlMask); in handleMcaBank()
2265 ss << std::format(" MCA_CONFIG : 0x{:016X}\n", pBank->mcaConfig); in handleMcaBank()
2266 ss << std::format(" MCA_IPID : 0x{:016X}\n", pBank->mcaIpid); in handleMcaBank()
2267 ss << std::format(" MCA_SYND : 0x{:016X}\n", pBank->mcaSynd); in handleMcaBank()
2268 ss << std::format(" MCA_DESTAT : 0x{:016X}\n", pBank->mcaDestat); in handleMcaBank()
2269 ss << std::format(" MCA_DEADDR : 0x{:016X}\n", pBank->mcaDeaddr); in handleMcaBank()
2270 ss << std::format(" MCA_MISC1 : 0x{:016X}\n", pBank->mcaMisc1); in handleMcaBank()
2283 const auto* pBank = reinterpret_cast<const T*>(data.data()); in handleVirtualBank() local
2285 if (data.size() < sizeof(T) + sizeof(BankCorePair) * pBank->mcaCount) in handleVirtualBank()
2293 ss << std::format(" S5_RESET_STATUS : 0x{:08X}\n", pBank->s5ResetSts); in handleVirtualBank()
2294 ss << std::format(" PM_BREAKEVENT : 0x{:08X}\n", pBank->breakevent); in handleVirtualBank()
2297 ss << std::format(" WARMCOLDRSTSTATUS : 0x{:08X}\n", pBank->rstSts); in handleVirtualBank()
2299 ss << std::format(" PROCESSOR NUMBER : 0x{:04X}\n", pBank->procNum); in handleVirtualBank()
2300 ss << std::format(" APIC ID : 0x{:08X}\n", pBank->apicId); in handleVirtualBank()
2301 ss << std::format(" EAX : 0x{:08X}\n", pBank->eax); in handleVirtualBank()
2302 ss << std::format(" EBX : 0x{:08X}\n", pBank->ebx); in handleVirtualBank()
2303 ss << std::format(" ECX : 0x{:08X}\n", pBank->ecx); in handleVirtualBank()
2304 ss << std::format(" EDX : 0x{:08X}\n", pBank->edx); in handleVirtualBank()
2306 for (size_t i = 0; i < pBank->mcaCount; i++) in handleVirtualBank()
2308 ss << std::format("(0x{:02X},0x{:02X}) ", pBank->mcaList[i].bankId, in handleVirtualBank()
2309 pBank->mcaList[i].coreId); in handleVirtualBank()
2326 const auto* pBank = reinterpret_cast<const CrdCpuWdtBank*>(data.data()); in handleCpuWdtBank() local
2331 pBank->hwAssertStsHi[i]); in handleCpuWdtBank()
2333 pBank->hwAssertStsLo[i]); in handleCpuWdtBank()
2335 pBank->origWdtAddrLogHi[i]); in handleCpuWdtBank()
2337 pBank->origWdtAddrLogLo[i]); in handleCpuWdtBank()
2339 pBank->hwAssertMskHi[i]); in handleCpuWdtBank()
2341 pBank->hwAssertMskLo[i]); in handleCpuWdtBank()
2343 pBank->origWdtAddrLogStat[i]); in handleCpuWdtBank()
2362 const CrdHwAssertBank<N>* pBank = in handleHwAssertBank() local
2369 pBank->hwAssertStsHi[i]); in handleHwAssertBank()
2371 pBank->hwAssertStsLo[i]); in handleHwAssertBank()
2373 pBank->hwAssertMskHi[i]); in handleHwAssertBank()
2375 pBank->hwAssertMskLo[i]); in handleHwAssertBank()
2392 const auto* pBank = reinterpret_cast<const CrdPcieAerBank*>(data.data()); in handlePcieAerBank() local
2393 ss << std::format(" [Bus{} Dev{} Fun{}]\n", pBank->bus, pBank->dev, in handlePcieAerBank()
2394 pBank->fun); in handlePcieAerBank()
2396 pBank->cmd); in handlePcieAerBank()
2398 pBank->sts); in handlePcieAerBank()
2400 pBank->slot); in handlePcieAerBank()
2402 pBank->secondBus); in handlePcieAerBank()
2404 pBank->vendorId); in handlePcieAerBank()
2406 pBank->devId); in handlePcieAerBank()
2408 pBank->classCodeHi, pBank->classCodeLo); in handlePcieAerBank()
2410 pBank->secondSts); in handlePcieAerBank()
2412 pBank->ctrl); in handlePcieAerBank()
2414 pBank->uncorrErrSts); in handlePcieAerBank()
2416 pBank->uncorrErrMsk); in handlePcieAerBank()
2418 pBank->uncorrErrSeverity); in handlePcieAerBank()
2420 pBank->corrErrSts); in handlePcieAerBank()
2422 pBank->corrErrMsk); in handlePcieAerBank()
2424 pBank->hdrLogDw0); in handlePcieAerBank()
2426 pBank->hdrLogDw1); in handlePcieAerBank()
2428 pBank->hdrLogDw2); in handlePcieAerBank()
2430 pBank->hdrLogDw3); in handlePcieAerBank()
2432 pBank->rootErrSts); in handlePcieAerBank()
2434 pBank->corrErrSrcId); in handlePcieAerBank()
2436 pBank->errSrcId); in handlePcieAerBank()
2438 pBank->laneErrSts); in handlePcieAerBank()
2450 const auto* pBank = reinterpret_cast<const CrdWdtRegBank*>(data.data()); in handleWdtRegBank() local
2451 if (data.size() < sizeof(CrdWdtRegBank) + sizeof(uint32_t) * pBank->count) in handleWdtRegBank()
2458 ss << std::format(" [NBIO{}] {}\n", pBank->nbio, pBank->name); in handleWdtRegBank()
2459 ss << std::format(" Address: 0x{:08X}\n", pBank->addr); in handleWdtRegBank()
2460 ss << std::format(" Data Count: {}\n", pBank->count); in handleWdtRegBank()
2462 for (size_t i = 0; i < pBank->count; i++) in handleWdtRegBank()
2464 ss << std::format(" {}: 0x{:08X}\n", i, pBank->data[i]); in handleWdtRegBank()
2481 const auto* pBank = reinterpret_cast<const CrdHdrBank*>(data.data()); in handleCrdHdrBank() local
2483 ss << std::format(" CPU PPIN : 0x{:016X}\n", pBank->ppin); in handleCrdHdrBank()
2484 ss << std::format(" UCODE VERSION : 0x{:08X}\n", pBank->ucodeVer); in handleCrdHdrBank()
2485 ss << std::format(" PMIO 80h : 0x{:08X}\n", pBank->pmio); in handleCrdHdrBank()
2488 pBank->pmio & 0x1); in handleCrdHdrBank()
2490 (pBank->pmio & 0x4) >> 2); in handleCrdHdrBank()
2492 (pBank->pmio & 0x8) >> 3); in handleCrdHdrBank()
2494 (pBank->pmio & 0x10) >> 4); in handleCrdHdrBank()