x86: gpio: Correct GPIO setup ordering

The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO
is probed. However, it assumes that the first GPIO to be probed is in the
first GPIO

x86: gpio: Correct GPIO setup ordering

The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO
is probed. However, it assumes that the first GPIO to be probed is in the
first GPIO bank. If this is not the case then the init will write to the
wrong registers.

Fix this. Also add a note that this code is deprecated. We should move to
using device tree instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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gpio: Use const where possible

Some functions do not change the struct gpio_desc parameter. Update these to
use const so this is clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bi

gpio: Use const where possible

Some functions do not change the struct gpio_desc parameter. Update these to
use const so this is clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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gpio: Add a function to obtain a GPIO vector value

We can use GPIOs as binary digits for reading 'strapping' values. Each GPIO
is assigned a single bit and can be set high or low on the circuit boar

gpio: Add a function to obtain a GPIO vector value

We can use GPIOs as binary digits for reading 'strapping' values. Each GPIO
is assigned a single bit and can be set high or low on the circuit board. We
already have a legacy function for reading these values. Add one that
supports driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: Use uclass_first_device_err() where it is useful

Use this new function in places where it simplifies the code.

Signed-off-by: Simon Glass <sjg@chromium.org>

gpio: uniphier: add driver for UniPhier GPIO controller

This GPIO controller device is used on UniPhier SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <s

gpio: uniphier: add driver for UniPhier GPIO controller

This GPIO controller device is used on UniPhier SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>

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stm32: add support for stm32f7 & stm32f746 discovery board

This patch adds support for stm32f7 family & stm32f746 board.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

gpio: stm32_gpio: move base addresses to the soc file

Base addresses for GPIOs could be different for different socs, this
patch moves the base addresses from driver to the soc specific location.

S

gpio: stm32_gpio: move base addresses to the soc file

Base addresses for GPIOs could be different for different socs, this
patch moves the base addresses from driver to the soc specific location.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

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gpio: stm32_gpio: move clock config from driver to board

This patch removes the gpio clock enable from gpio driver & move it in the
board code, making it possible to use the gpio driver with other s

gpio: stm32_gpio: move clock config from driver to board

This patch removes the gpio clock enable from gpio driver & move it in the
board code, making it possible to use the gpio driver with other socs.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>

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tegra: gpio: Show the GPIO value for outputs

The tegra GPIO controller has two ways of reading the value of a GPIO. It
can supply the 'input' value (which is the value read from the pin) and the
'ou

tegra: gpio: Show the GPIO value for outputs

The tegra GPIO controller has two ways of reading the value of a GPIO. It
can supply the 'input' value (which is the value read from the pin) and the
'output' value (which is the value being driven from the pin. With a GPIO
set to output mode, the 'input' value is always low which is not very
useful.

This has the unfortunate result that setting a GPIO high still leaves it
showing as low in the 'gpio status' command.

Adjust the driver to check which direction the GPIO is set to, then read
the value from the appropriate register: 'input' for input GPIOs, 'output'
for output GPIOs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

Use correct spelling of "U-Boot"

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed

Use correct spelling of "U-Boot"

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>

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x86: ich6_gpio: Convert to use proper DM API

At present this GPIO driver still uses the legacy PCI API. Now that
we have proper PCH drivers we can use those to obtain the information
we need. While

x86: ich6_gpio: Convert to use proper DM API

At present this GPIO driver still uses the legacy PCI API. Now that
we have proper PCH drivers we can use those to obtain the information
we need. While the device tree has nodes for the GPIO peripheral it is
not in the right place. It should be on the PCI bus as a sub-peripheral
of the PCH device.

Update the device tree files to show the GPIO controller within the PCH,
so that PCI access works as expected. This also adds '#address-cells'
and '#size-cells' to the PCH node.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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dm: vybrid_gpio: Drop legacy code

All boards using this driver are with device tree support,
hence drop the legacy code in driver to have a pure DT solution.

Signed-off-by: Bhuvanchandra DV <bhuvan

dm: vybrid_gpio: Drop legacy code

All boards using this driver are with device tree support,
hence drop the legacy code in driver to have a pure DT solution.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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drivers: gpio: add driver for Microchip PIC32 GPIO controller.

In PIC32 GPIO controller is part of PIC32 pin controller.
PIC32 has ten independently programmable ports and each with multiple pins.
E

drivers: gpio: add driver for Microchip PIC32 GPIO controller.

In PIC32 GPIO controller is part of PIC32 pin controller.
PIC32 has ten independently programmable ports and each with multiple pins.
Each of these pins can be configured and used as GPIO, provided they
are not in use for other peripherals.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

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bug.h: move BUILD_BUG_* defines to include/linux/bug.h

BUILD_BUG_* macros have been defined in several headers. It would
be nice to collect them in include/linux/bug.h like Linux.

This commit is c

bug.h: move BUILD_BUG_* defines to include/linux/bug.h

BUILD_BUG_* macros have been defined in several headers. It would
be nice to collect them in include/linux/bug.h like Linux.

This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.

I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot. I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

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rockchip: gpio: Implement the get_function() method

Provide this method so that 'gpio status' works fully. It now shows
whether a pin is used for input, output or some other function.

Signed-off-by

rockchip: gpio: Implement the get_function() method

Provide this method so that 'gpio status' works fully. It now shows
whether a pin is used for input, output or some other function.

Signed-off-by: Simon Glass <sjg@chromium.org>

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rockchip: gpio: Read the GPIO value correctly

This function should return 0 or 1, not a mask. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>