| e3917b21 | 03-Jun-2014 |
Boschung, Rainer <Rainer.Boschung@keymile.com> |
kmp204x: prepare to use CPU watchdog
This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valen
kmp204x: prepare to use CPU watchdog
This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| 6caa185a | 03-Jun-2014 |
Boschung, Rainer <Rainer.Boschung@keymile.com> |
kmp204x/qrio: support for setting the CPU reset request mode
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: Rainer Boschu
kmp204x/qrio: support for setting the CPU reset request mode
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| a09f470d | 03-Jun-2014 |
Boschung, Rainer <Rainer.Boschung@keymile.com> |
kmp204x: set CPU watchdog reset reason flag
Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.
This allows the applictio
kmp204x: set CPU watchdog reset reason flag
Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.
This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| 2846c43e | 30-Apr-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: add workaround for A-004849
This should prevent the problems that the CCF can deadlock with certain
traffic patterns.
This also fixes the workaround for A-006559 that was not correctly
imp
kmp204x: add workaround for A-004849
This should prevent the problems that the CCF can deadlock with certain
traffic patterns.
This also fixes the workaround for A-006559 that was not correctly
implemented before.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| e20c822d | 30-Apr-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: update the RCW
Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are
used as internal interrupts are defined as GPIOs to avoid confusion
between the internal/external interru
kmp204x: update the RCW
Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are
used as internal interrupts are defined as GPIOs to avoid confusion
between the internal/external interrupts.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| af47faf6 | 30-Apr-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: complete the reset sequence and PRST configuration
This adds the reset support for the following devices that was until
then not implemented:
- BFTIC4
- QSFPs
This also fixes the configura
kmp204x: complete the reset sequence and PRST configuration
This adds the reset support for the following devices that was until
then not implemented:
- BFTIC4
- QSFPs
This also fixes the configuration of the prst behaviour for the other
resets: Only the u-boot and kernel relevant subsystems are taken out of
reset (pcie, ZL30158, and front eth phy).
Most of the prst config move to misc_init_f(), except for the PCIe
related ones that are in pci_init_board and the bftic and ZL30158 ones
that should be done as soon as possible.
Only the behavior of the Hooper reset is changed according to the
documentation as the application is not able to not configure the switch
when it is not reset.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| 18794944 | 30-Apr-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: selftest/factory test pin support
This patch defines the post_hotkeys_pressed() function that is used for:
- triggering POST memory regions test
- starting the test application through the
kmp204x: selftest/factory test pin support
This patch defines the post_hotkeys_pressed() function that is used for:
- triggering POST memory regions test
- starting the test application through the checktestboot command in
a script by setting the active bank to testbank
The post_hotkeys_pressed return the state of the SELFTEST pin.
The patch moves from the complete POST-memory test that is too long in
its SLOW version for our production HW test procedure to the much shorter
POST-memory-regions test.
Finally, the unused #defines for the not so relevant mtest command are
removed.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| 4921a149 | 02-May-2014 |
Stefan Bigler <stefan.bigler@keymile.com> |
kmp204x: handle dip-switch for factory settings
Add readout of dip-switch to revert to factory settings.
If one or more dip-switch are set, launch bank 0 that contains the
bootloader to do the requi
kmp204x: handle dip-switch for factory settings
Add readout of dip-switch to revert to factory settings.
If one or more dip-switch are set, launch bank 0 that contains the
bootloader to do the required action.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| 9c134e18 | 13-Feb-2014 |
Gerlando Falauto <gerlando.falauto@keymile.com> |
arm/km: introduce kmsugp1 target
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use
arm/km: introduce kmsugp1 target
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Cc: Valentin Longchamp <valenting.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| b1c2a7ae | 27-Jan-2014 |
Gerlando Falauto <gerlando.falauto@keymile.com> |
arm/km: define fdt_high env variable and allow backwards compatibility
Add set_fdthigh subcommand to "subbootcmds" (release) so to set "fdt_high"
This is necessary on Kirkwood so that the FDT does n
arm/km: define fdt_high env variable and allow backwards compatibility
Add set_fdthigh subcommand to "subbootcmds" (release) so to set "fdt_high"
This is necessary on Kirkwood so that the FDT does not get relocated
above the memory limit that the kernel cannot access
(that is the memory part reserved for the switch).
This was tested on NUSA1, where it is necessary, and on ETER1, where it
doesn't seem to hurt.
We want the scripts to also work with older versions of u-boot, where:
a) set_fdthigh is not defined (will be default env for newer u-boots)
b) the fdt will not be available
For this reason, we use "set_fdthigh" to tell whether we are running
a newer (FDT-aware) u-boot or not.
So if "set_fdthigh" runs successfully or arch != arm we try loading
the fdt; otherwise we proceed normally.
Notice how, contrary to release mode, set_fdthigh will _not_ be part of
subbootcmds for develop and ramfs, but will be executed as part of
"tftpfdt".
Since this is only needed for kirkwood cards, and it prevents the kernel
from booting on QorIQ (though it seemed to work on ETER1), we change
its definition in the default env for powerpc so that the value is only
set on ARM.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| 7b2268b8 | 27-Jan-2014 |
Gerlando Falauto <gerlando.falauto@keymile.com> |
arm/km: enable FDT for km_kirwkood
This consists of:
a) Defining the addresses, enabling fdtsupport [arm]
b) Defining "cramfsloadfdt" [arm,powerpc => common]
c) Adding the FDT address to bootm [arm
arm/km: enable FDT for km_kirwkood
This consists of:
a) Defining the addresses, enabling fdtsupport [arm]
b) Defining "cramfsloadfdt" [arm,powerpc => common]
c) Adding the FDT address to bootm [arm,powerpc => common]
d) Defining "tftpfdt" in ramfs-,develop- [arm,powerpc >= common]
This should work with 3.10 kernels, whether loaded through TFTP
(with rootfs either through NFS or TFTP-ramfs) or from the NAND.
The machid was left unchanged, this should keep compatibility with both
older and newer kernels.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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| 27c78e06 | 27-Jan-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: initial support for PCIe FPGA configuration
The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the
kmp204x: initial support for PCIe FPGA configuration
The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the kernel start, u-boot has to take care that the FPGA gets
configured also in other reset scenarios, mostly because of possible
configuration change.
The used mechanism is taken from the km_kirkwood design and adapted to
the kmp204x case (slightly different HW and PCIe configuration).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| 1f07a71b | 27-Jan-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: update I2C field of RCW
On the previous HW revision (now unsupported), there was a need for
external DMA signals and thus the I2C3/4 signals were used
DMA1_DONE/ACK/REQ.
These signals now
kmp204x: update I2C field of RCW
On the previous HW revision (now unsupported), there was a need for
external DMA signals and thus the I2C3/4 signals were used
DMA1_DONE/ACK/REQ.
These signals now are configured as GPIO[16:19].
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| fabb9297 | 27-Jan-2014 |
Valentin Longchamp <valentin.longchamp@keymile.com> |
kmp204x: implement workaround for A-006559
According to the errata, some bits of an undocumented register in the
DCSR must be set for every core in order to avoid a possible data or
instruction corr
kmp204x: implement workaround for A-006559
According to the errata, some bits of an undocumented register in the
DCSR must be set for every core in order to avoid a possible data or
instruction corruption.
This is required for the 2.0 revision of the P2041 that should be used
as soon as available in our design.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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