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545c12cf |
| 25-Mar-2013 |
Xu Jiucheng <B37781@freescale.com> |
powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is mul
powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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612404c2 |
| 09-Jan-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge 'u-boot-atmel/master' into 'u-boot-arm/master'
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79f38777 |
| 08-Jan-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
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96764df1 |
| 22-Dec-2012 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge samsung, imx, tegra into u-boot-arm/master This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as wel
Merge samsung, imx, tegra into u-boot-arm/master This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manual merge fixes.
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a098cf41 |
| 19-Dec-2012 |
Allen Martin <amartin@nvidia.com> |
Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/unive
Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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2c601c72 |
| 09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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05a860c2 |
| 08-Dec-2012 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot into master Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h
Merge branch 'master' of git://git.denx.de/u-boot into master Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/woodburn_common.h board/woodburn/woodburn.c These boards still use the old old PMIC framework, so they do not merge properly after the power framework was merged into mainline. Fix all conflicts and update woodburn to use Power Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
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b8715d8d |
| 29-Nov-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fdt
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e57d9d15 |
| 28-Nov-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-x86
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a86fcff6 |
| 28-Nov-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
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d41b3cc1 |
| 27-Nov-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mips
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e76cd5d4 |
| 23-Oct-2012 |
Andy Fleming <afleming@freescale.com> |
8xxx: Change all 8*xx_DDR addresses to 8xxx There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR
8xxx: Change all 8*xx_DDR addresses to 8xxx There were a number of shared files that were using CONFIG_SYS_MPC85xx_DDR_ADDR, or CONFIG_SYS_MPC86xx_DDR_ADDR, and several variants (DDR2, DDR3). A recent patchset added 85xx-specific ones to code which was used by 86xx systems. After reviewing places where these constants were used, and noting that the type definitions of the pointers assigned to point to those addresses were the same, the cleanest approach to fixing this problem was to unify the namespace for the 85xx, 83xx, and 86xx DDR address definitions. This patch does: s/CONFIG_SYS_MPC8.xx_DDR/CONFIG_SYS_MPC8xxx_DDR/g All 85xx, 86xx, and 83xx have been built with this change. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Andy Fleming <afleming@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
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dfe16103 |
| 26-Nov-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
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13d1143f |
| 12-Oct-2012 |
Scott Wood <scottwood@freescale.com> |
powerpc/mpc85xx/p2020rdb-pca: Use L2 SRAM for SPL boot This allows DDR configuration to be deferred to the final U-Boot image, which is able to make use of SPD data. The SPL itself cann
powerpc/mpc85xx/p2020rdb-pca: Use L2 SRAM for SPL boot This allows DDR configuration to be deferred to the final U-Boot image, which is able to make use of SPD data. The SPL itself cannot use SPD due to code size constraints. It previously used fixed register values for DDR configuration, and those values did not work on the p2020rdb-pca board I tested with. It's possible that different revisions of the board require different settings. Using SPD eliminates that problem. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
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94a45bb1 |
| 20-Sep-2012 |
Scott Wood <scottwood@freescale.com> |
powerpc/mpc85xx/p1_p2_rdb_pc: new SPL support Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Flem
powerpc/mpc85xx/p1_p2_rdb_pc: new SPL support Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
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