| #
ed80584f |
| 06-Jan-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Support H3 CCU security switches
H3's CCU includes some switches which disable non-secure access to some
of the more critical clock controls, such as MBUS, PLLs, and main
plat
sunxi: Support H3 CCU security switches
H3's CCU includes some switches which disable non-secure access to some
of the more critical clock controls, such as MBUS, PLLs, and main
platform busses.
Configure them to enable non-secure access.
For now the only SoC that has this feature is the H3. For other
platforms just use a default (weak) empty function so things do
not break.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
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| #
f1993ca0 |
| 03-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
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| #
5076c64a |
| 11-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-spi
|
| #
f7a5f025 |
| 11-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
|
| #
a5d4785c |
| 11-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
cbc1a91a |
| 20-Nov-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs
According to the datasheets the max speed of AHB1 is 276 MHz, so
setting it to PLL6 / 3 which gives us 200MHz everywhere i
sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs
According to the datasheets the max speed of AHB1 is 276 MHz, so
setting it to PLL6 / 3 which gives us 200MHz everywhere is fine,
and gives us a nice speed-up in certain workloads.
Suggested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tested-by: Chen-Yu Tsai <wens@csie.org>
show more ...
|
| #
a85670e4 |
| 04-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
|
| #
c1924d85 |
| 30-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-video
|
| #
80d307d1 |
| 22-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
52d09311 |
| 19-Nov-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6
sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So this configuration should
be safe for use in U-Boot too.
PLL6 also needs to be configured before it is used as the clock
source, according to the "CCU / Programming Guidelines" section
of the Allwinner manual.
The current low AHB1 clock speed is limiting the USB transfer
speed when booting via FEL. This patch can increase the FEL USB
transfer speed from ~510 KB/s to ~950 KB/s.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
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| #
0404d53f |
| 17-Nov-2015 |
Jens Kuske <jenskuske@gmail.com> |
sunxi: Add H3 DRAM initialization support
Based on existing A23/A33 code and the original H3 boot0.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <h
sunxi: Add H3 DRAM initialization support
Based on existing A23/A33 code and the original H3 boot0.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
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| #
7c0e5d86 |
| 30-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-video
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| #
632093b5 |
| 14-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
61dfa65e |
| 14-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-pmic
|
| #
55ea98d8 |
| 08-Aug-2015 |
Hans de Goede <hdegoede@redhat.com> |
sun6i: clock: Add support for the mipi pll
Add support for the mipi pll, this is necessary for getting higher dotclocks
with lcd panels.
Signed-off-by: Hans de Goede <hdegoede@r
sun6i: clock: Add support for the mipi pll
Add support for the mipi pll, this is necessary for getting higher dotclocks
with lcd panels.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
show more ...
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| #
49043cba |
| 08-Aug-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: clock: Add clock_get_pll3() helper function
Add a helper function to get the pll3 clock rate.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <i
sunxi: clock: Add clock_get_pll3() helper function
Add a helper function to get the pll3 clock rate.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
show more ...
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| #
e2c1c5ba |
| 10-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
|
| #
15f8876b |
| 08-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
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| #
0ecb43a8 |
| 03-Aug-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: display: Add a few extra register and constant defines
Add a few extra sunxi display registers and constant defines.
Also rename some existing defines (e.g. dropping _GCTRL)
sunxi: display: Add a few extra register and constant defines
Add a few extra sunxi display registers and constant defines.
Also rename some existing defines (e.g. dropping _GCTRL) and make
some more generic (e.g. dropping the 2x scaling from
SUNXI_LCDC_TCON1_TIMING_V_TOTAL).
This is a preparation patch for adding composite video out support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
show more ...
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| #
4d80051b |
| 08-Jun-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
|
| #
563e53ef |
| 01-Jun-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-net
Fixup include/configs/unipher.h to not set CONFIG_LIB_RAND
Signed-off-by: Tom Rini <trini@konsulko.com>
|
| #
656ae052 |
| 01-Jun-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
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| #
43b1ff5f |
| 30-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
|
| #
b1f7ecc9 |
| 30-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
d0f42003 |
| 26-May-2015 |
Roy Spliet <r.spliet@ultimaker.com> |
sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA
Make sure definitions for NAND clock and DMA gate bits are the same
across boards.
Signed-off-by: Roy Spliet <r
sunxi: Match sun4i, sun6i, sun9i CCI definitions for NAND and DMA
Make sure definitions for NAND clock and DMA gate bits are the same
across boards.
Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|