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778dc5f4 |
| 06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans d
ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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dae08d22 |
| 06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top() For psci_get_cpu_stack_top() to be usable in C code, it must adhere to the ARM calling conventions. Since it could be called whe
ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top() For psci_get_cpu_stack_top() to be usable in C code, it must adhere to the ARM calling conventions. Since it could be called when the stack is still unavailable, and the entry code to linux also expects r1 and r2 to remain unchanged, stick to r0 and r3. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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0e6b7a28 |
| 18-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-samsung
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9597494e |
| 14-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
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3317b988 |
| 21-Apr-2015 |
Jan Kiszka <jan.kiszka@siemens.com> |
ARM: Put target PC for PSCI CPU_ON on per-CPU stack Use a per-CPU variable for saving the target PC during CPU_ON operations. This allows us to run this service independently on targets
ARM: Put target PC for PSCI CPU_ON on per-CPU stack Use a per-CPU variable for saving the target PC during CPU_ON operations. This allows us to run this service independently on targets that have more than 2 cores and also core-local power control. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
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4c681a3d |
| 21-Apr-2015 |
Jan Kiszka <jan.kiszka@siemens.com> |
ARM: Factor out reusable psci_get_cpu_stack_top This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier <marc.z
ARM: Factor out reusable psci_get_cpu_stack_top This algorithm will be useful on Tegra as well, plus we will need it for making _psci_target_pc per-CPU. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
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4ce4de1e |
| 21-Apr-2015 |
Jan Kiszka <jan.kiszka@siemens.com> |
ARM: Factor out reusable psci_cpu_entry _sunxi_cpu_entry can be converted completely into a reusable psci_cpu_entry. Tegra124 will use it as well. As with psci_disable_smp, also
ARM: Factor out reusable psci_cpu_entry _sunxi_cpu_entry can be converted completely into a reusable psci_cpu_entry. Tegra124 will use it as well. As with psci_disable_smp, also the enabling is designed to be overloaded in cased SMP is not controlled via ACTLR. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
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b0206e7d |
| 21-Apr-2015 |
Jan Kiszka <jan.kiszka@siemens.com> |
ARM: Factor out reusable psci_cpu_off_common Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely cache disabling and flushing, clrex and the disabling of SMP for the
ARM: Factor out reusable psci_cpu_off_common Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely cache disabling and flushing, clrex and the disabling of SMP for the dying CPU. These steps are apparently generic for ARMv7 and will be reused for Tegra124 support. As the way of disabled SMP is not architectural, though commonly done via ACLTR, the related function can be overloaded. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
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680f3968 |
| 21-Apr-2015 |
Jan Kiszka <jan.kiszka@siemens.com> |
ARM: Factor out common psci_get_cpu_id Will be required for obtaining the ID of the current CPU in shared PSCI functions. The default implementation requires a dense ID space and only
ARM: Factor out common psci_get_cpu_id Will be required for obtaining the ID of the current CPU in shared PSCI functions. The default implementation requires a dense ID space and only supports a single cluster. Therefore, the functions can be overloaded in cases where these assumptions do not hold. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Tom Warren <twarren@nvidia.com>
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c23154aa |
| 08-Aug-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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dcdb61a0 |
| 04-Aug-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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362f16b1 |
| 29-Jul-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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ecf07a79 |
| 12-Jul-2014 |
Marc Zyngier <marc.zyngier@arm.com> |
ARM: HYP/non-sec: add generic ARMv7 PSCI code Implement core support for PSCI. As this is generic code, it doesn't implement anything really useful (all the functions are returning N
ARM: HYP/non-sec: add generic ARMv7 PSCI code Implement core support for PSCI. As this is generic code, it doesn't implement anything really useful (all the functions are returning Not Implemented). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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