#
f7e48c54 |
| 19-Jul-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return m
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09
clk: - Fix zynqmp clock driver
common: - Handle CMD_RET_USAGE in cmd_process_error - Use return macros in cmd_process_error - Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2 - Support watchdog in usb_kbd.c - Fix name usage in usb_kbd.c - Support systems with non zero memory start initialized from DT only
gpio: - Add support for manual relocation in uclass - zynq - use live tree - zynq - fix match data reading - zynq - setup bank name - xilinx - convert driver to DM
microblaze: - Use generic iounmap/ioremap implementations - Redesign reset logic with sysreset features - Use watchdog and gpio over DM - Remove unused macros and fix some checkpatch issues - Fix timer initialization not to be called twice
serial: - zynq - Use platdata intead of priv data
sysreset: - Add support for manual relocation in uclass - Add gpio-restart driver - Add microblaze soft reset driver
watchdog: - Add support for aliases in uclass - Add support for manual relocation in uclass - Convert xilinx driver to DM - cadence - update info in the driver and not stop wdt in probe
xilinx: - Enable LED gpio for some targets with gpio-leds DT node - Setup variables via Kconfig
zynq: - Add support for watchdog aliases - Add support for mini nand/nor configurations - Wire FPGA initalization in SPL
zynqmp: - Enable mass storage for zcu100 - Handle external pmufw files - Add support for secure images - Some Kconfig movements and alignments - Add support for watchdog aliases - Use subcommands style for platform command - Add mmio_read/write platform commands - DT updates - Add support for mini qspi configuration
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#
0d832b32 |
| 13-Jul-2018 |
Michal Simek <michal.simek@xilinx.com> |
sysreset: Add support for gpio-restart
The Linux kernel has binding for gpio-restart node. This patch is adding basic support without supporting any optional properties. This driver was tested on Mi
sysreset: Add support for gpio-restart
The Linux kernel has binding for gpio-restart node. This patch is adding basic support without supporting any optional properties. This driver was tested on Microblaze system where gpio is connected to SoC reset logic. Output value is handled via gpios cells values.
In gpio_reboot_request() set_value is writing 1 because dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW. ... if (desc->flags & GPIOD_ACTIVE_LOW) value = !value; ...
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
894c3ad2 |
| 08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Bo
board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
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#
e2a1484c |
| 14-Jun-2018 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
MAINTAINERS: Add entries for Actions Semi OWL family
Add myself as the Maintainer for Actions Semi OWL family and its relevant board, drivers.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadha
MAINTAINERS: Add entries for Actions Semi OWL family
Add myself as the Maintainer for Actions Semi OWL family and its relevant board, drivers.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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#
92a14a47 |
| 10-Jun-2018 |
Ramon Fried <ramon.fried@gmail.com> |
MAINTAINERS: update ARM Snapdragon
Replace Mateusz as Maintainer for ARM Snapdragon arch.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Acked-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.c
MAINTAINERS: update ARM Snapdragon
Replace Mateusz as Maintainer for ARM Snapdragon arch.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Acked-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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#
a0115ceb |
| 03-Jun-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-03
A number of fixes and feature completeness work this time around:
- Fix sunxi GOP reservation - Fi
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-06-03
A number of fixes and feature completeness work this time around:
- Fix sunxi GOP reservation - Fix cursor position - Fix efi_get_variable - Allow more selftest parts to build on x86_64 - Allow unaligned memory access on armv7 - Implement ReinstallProtocolInterface - More sandbox preparation
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#
6b03cd10 |
| 11-May-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
efi_loader: DocBook comments for boot services
With 'make htmldocs' we can generate a documentation if the function comments follow the DocBook conventions.
This patch adjusts the comments for EFI
efi_loader: DocBook comments for boot services
With 'make htmldocs' we can generate a documentation if the function comments follow the DocBook conventions.
This patch adjusts the comments for EFI boot services and provides the DocBook template for the EFI subsystem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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#
c90c43cd |
| 31-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Here we do a couple of minor fixes like: - Move .ivt section to the very beginning of the image by default which allows us
Merge tag 'arc-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Here we do a couple of minor fixes like: - Move .ivt section to the very beginning of the image by default which allows us to use that image put right at reset vector (usually 0x0)
- Improve relocation fix-up which became required once we moved .ivt and understood a problem with existing implementation where we relied on a particular placement of sections. Now we don't care about placement because we just explicitly check for .text and in case of ARCompact .ivt sections
- Re-implemnt do_reset() such that it calls reset_cpu() which could implmented for a particular board
And hte most important part we introduce support for yet another devboard from Synopsys - EMDK.
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#
b08b113e |
| 25-May-2018 |
Alexey Brodkin <Alexey.Brodkin@synopsys.com> |
MAINTAINERS: Add board/synopsys/
As of today 'board/synopsys/' folder contains only Synopsys ARC boards supported by the same people who support 'arch/arc'.
Signed-off-by: Alexey Brodkin <abrodkin@
MAINTAINERS: Add board/synopsys/
As of today 'board/synopsys/' folder contains only Synopsys ARC boards supported by the same people who support 'arch/arc'.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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#
9c2369a5 |
| 29-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
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#
592b4a7e |
| 25-May-2018 |
Ken Ma <make@marvell.com> |
ata: mvebu: move mvebu sata driver to drivers/ata directory
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this patch moves it to drivers/ata directory with renaming "sata.c" to "a
ata: mvebu: move mvebu sata driver to drivers/ata directory
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this patch moves it to drivers/ata directory with renaming "sata.c" to "ahci_mvebu.c" which is aligned to Linux. New ahci driver's kconfig option is added as AHCI_MVEBU which selects SCSI_AHCI and is based on AHCI.
Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
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#
c3600e1f |
| 17-May-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.co
stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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#
3b52847a |
| 11-May-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07
microblaze: - Align defconfig
zynq: - Rework fpga initialization and cpuinfo handling
zynqmp
Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2018.07
microblaze: - Align defconfig
zynq: - Rework fpga initialization and cpuinfo handling
zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING
zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation
mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode
nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params
scsi: - convert ceva sata to UCLASS_AHCI
timer: - Add Cadence TTC for ZynqMP r5
watchdog: - Minor cadence driver cleanup
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#
1d6c54ec |
| 12-Apr-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm: zynqmp: Add ZynqMP minimal R5 support
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with
arm: zynqmp: Add ZynqMP minimal R5 support
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time.
This configuration with uart1 was tested on zcu100-revC.
U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)
Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5>
There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split
2. Load via jtag when directly to R5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
b123aff2 |
| 13-Apr-2018 |
Alexander Graf <agraf@suse.de> |
MAINTAINERS: Declare tools/zynqmp* as Xilinx maintained
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINT
MAINTAINERS: Declare tools/zynqmp* as Xilinx maintained
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by Xilinx for the Zynq platforms. Let's match them accordingly in the MAINTAINERS file.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
6de7a5b9 |
| 18-Apr-2018 |
Michal Simek <michal.simek@xilinx.com> |
MAINTAINERS: zynqmp: Point to proper zynqmp folder
Point to Zynqmp arm64 cpu folder not to Zynq arm32.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
72c37d12 |
| 17-Apr-2018 |
Michal Simek <michal.simek@xilinx.com> |
timer: Add Cadence TTC timer counter support
This driver was tested on Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
08ae21af |
| 01-May-2018 |
Fabio Estevam <fabio.estevam@nxp.com> |
MAINTAINERS: Switch nxp.com domain
freescale.com domain is no longer reachable, so switch the maintainers' emails to nxp.com domain instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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#
f4df1f76 |
| 17-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'arc-for-2018.05-rc3' of git://git.denx.de/u-boot-arc
Subtle ARC fixes for v2018.05-RC3
These are only very subtle clean-ups here and there including:
* Correctly specified CPU freq for
Merge tag 'arc-for-2018.05-rc3' of git://git.denx.de/u-boot-arc
Subtle ARC fixes for v2018.05-RC3
These are only very subtle clean-ups here and there including:
* Correctly specified CPU freq for HSDK (production boards are all shipped with 500MHZ as opposed to early batch running at 1GHz)
* Addition of SNPS internal group email to MAINTAINERS file * Switch to Hush shell on AXS10x boards
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#
4006200d |
| 17-Apr-2018 |
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> |
ARC: Update ARC architecture maintainers
Update ARC architecture maintainers and add uboot-snps-arc@synopsys.com mailing list.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-o
ARC: Update ARC architecture maintainers
Update ARC architecture maintainers and add uboot-snps-arc@synopsys.com mailing list.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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#
b57aaa07 |
| 03-Apr-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
MAINTAINERS: ARM STM STM32MP: correct file paths
Provide correct file paths.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
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#
2600df4f |
| 09-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL i
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel - Various defconfig updates - Add SPL init for zcu102 revA - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX and zc1751-dc3 - Net fixes - xlnx,phy-type - 64bit axi ethernet support - arasan: Fix nand write issue - fpga fixes - Maintainer file updates
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#
844fb498 |
| 09-Apr-2018 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-04-09
Highlights this time around:
- Lots of minor spec compliance fixes - Support full range of GOP BLT
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-04-09
Highlights this time around:
- Lots of minor spec compliance fixes - Support full range of GOP BLT commands - More fine grained error checking - Network fixes (init, DP) - Lots of other bug fixes...
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#
23e7e6b6 |
| 04-Apr-2018 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
MAINTAINERS: ZYNQMP: correct entries
Replace references to non-existent file.
Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Heinrich Schuchardt <xypr
MAINTAINERS: ZYNQMP: correct entries
Replace references to non-existent file.
Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v2018.03 |
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#
3d14228f |
| 13-Mar-2018 |
Michal Simek <michal.simek@xilinx.com> |
MAINTAINERS: Fix zynqmp clock driver path
Fix c&p error from Zynq.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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