5a122a6e | 03-May-2023 |
Brandon Kim <brandonkim@google.com> |
mdrv2: Attempt to update D-Bus objects in place
When systemInfoUpdate() is called multiple times, there's a potential race condition of a user polling for the objects while the array of D-Bus object
mdrv2: Attempt to update D-Bus objects in place
When systemInfoUpdate() is called multiple times, there's a potential race condition of a user polling for the objects while the array of D-Bus objects are erased and being repopulated. This results in incomplete set of memory or CPU counts, which can lead to unforseen consequences.
Tested: Verified that a corner case that was hitting this case consistently (when SMBIOS was transferred using ipmi-blob repeatedly) goes away with this implementation.
Signed-off-by: Brandon Kim <brandonkim@google.com> Change-Id: I312aa91cd11b1dd06502d04272889922108d39a2
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c39d3dfc | 10-May-2023 |
Patrick Williams <patrick@stwcx.xyz> |
clang-format: copy latest and re-format
clang-format-16 has some backwards incompatible changes that require additional settings for best compatibility and re-running the formatter. Copy the latest
clang-format: copy latest and re-format
clang-format-16 has some backwards incompatible changes that require additional settings for best compatibility and re-running the formatter. Copy the latest .clang-format from the docs repository and reformat the repository.
Change-Id: I172b14c1a881c734851b7dc6e0e90ee2e11cce03 Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
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ca2b38a6 | 08-May-2023 |
Jonathan Doman <jonathan.doman@intel.com> |
Add GNR and SRF to cpuinfoapp support
They do support same PCS and PIROM interfaces as previous generations.
Change-Id: Ib30df04dff9cd9506a193589234f1d52c76a022a Signed-off-by: Jonathan Doman <jona
Add GNR and SRF to cpuinfoapp support
They do support same PCS and PIROM interfaces as previous generations.
Change-Id: Ib30df04dff9cd9506a193589234f1d52c76a022a Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
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33ae81fe | 26-Apr-2023 |
Jason M. Bills <jason.m.bills@intel.com> |
Update to the new sdbusplus namespace format
The sdbusplus namespace format was updated in [1]. This updates the local namespaces to the new format.
[1]: https://github.com/openbmc/sdbusplus/commit
Update to the new sdbusplus namespace format
The sdbusplus namespace format was updated in [1]. This updates the local namespaces to the new format.
[1]: https://github.com/openbmc/sdbusplus/commit/5011340e14da7fc04f8b20721c4631f778200edd
Change-Id: Ic6b874fb86d2ff2192d8067871bd2170696f2b8c Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
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a3f5b385 | 26-Apr-2023 |
Jason M. Bills <jason.m.bills@intel.com> |
Update class name to MDRV2
In this sdbusplus change, [1], the class name in server.hpp was updated from MDR_V2 to MDRV2. This updates the local class name to match.
[1]: https://github.com/openbmc/
Update class name to MDRV2
In this sdbusplus change, [1], the class name in server.hpp was updated from MDR_V2 to MDRV2. This updates the local class name to match.
[1]: https://github.com/openbmc/sdbusplus/commit/5011340e14da7fc04f8b20721c4631f778200edd
Change-Id: I2c00b29837a72a985b3d1cc359b1bbd952074b63 Signed-off-by: Jason M. Bills <jason.m.bills@intel.com>
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949f634d | 20-Apr-2023 |
Jonathan Doman <jonathan.doman@intel.com> |
Add EMR support
EMR was not accounted for in the main cpuinfoapp check, nor in the check for SST control support.
Tested: Verified Model and ProtectedIdentificationNumber were populated under /redf
Add EMR support
EMR was not accounted for in the main cpuinfoapp check, nor in the check for SST control support.
Tested: Verified Model and ProtectedIdentificationNumber were populated under /redfish/v1/Systems/system/Processors/cpu0 for an EMR CPU.
Change-Id: I28bccc0f038384fb364245fa62eb4dae466fc795 Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
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59616938 | 24-Mar-2023 |
Zhikui Ren <zhikui.ren@intel.com> |
Add effectiveModel and Step to cpu property
Add effectiveModel and Step to cpu property. And correct the effectiveFamily of cpu property.
Reference: https://en.wikipedia.org/wiki/CPUID#EAX=1:_Proce
Add effectiveModel and Step to cpu property
Add effectiveModel and Step to cpu property. And correct the effectiveFamily of cpu property.
Reference: https://en.wikipedia.org/wiki/CPUID#EAX=1:_Processor_Info_and_Feature_Bits
Change-Id: I4d0ced7081003f41c7e7df13c29089b2f89a7721 Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com>
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0b1d942d | 31-Mar-2023 |
Joseph Fu <joseph.fu@quantatw.com> |
Fix memory extendedSize type
Modify "extendedSize" type to support 64-bit environment. The size_t type uses 8 bytes in a 64-bit environment, the properties "MemorySizeInKB" and "MemoryConfiguredSpee
Fix memory extendedSize type
Modify "extendedSize" type to support 64-bit environment. The size_t type uses 8 bytes in a 64-bit environment, the properties "MemorySizeInKB" and "MemoryConfiguredSpeedInMhz" will get wrong values from smbios file.
Tested: ``` root@qbmc:~# busctl introspect xyz.openbmc_project.Smbios.MDR_V2 \ > /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm0 \ > xyz.openbmc_project.Inventory.Item.Dimm .AllowedSpeedsMT property aq 0 emits-change writable .CASLatencies property q 0 emits-change writable .ECC property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .FormFactor property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .MaxMemorySpeedInMhz property q 4800 emits-change writable .MemoryAttributes property y 2 emits-change writable .MemoryConfiguredSpeedInMhz property q 1100 emits-change writable .MemoryDataWidth property q 64 emits-change writable .MemoryDeviceLocator property s "P0 CHANNEL A DIMM0" emits-change writable .MemoryMedia property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .MemorySizeInKB property t 3479875137107394560 emits-change writable .MemoryTotalWidth property q 0 emits-change writable ... ``` After ``` root@qbmc:~# busctl introspect xyz.openbmc_project.Smbios.MDR_V2 \ > /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm0 \ > xyz.openbmc_project.Inventory.Item.Dimm NAME TYPE SIGNATURE RESULT/VALUE FLAGS .AllowedSpeedsMT property aq 0 emits-change writable .CASLatencies property q 0 emits-change writable .ECC property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .FormFactor property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .MaxMemorySpeedInMhz property q 4800 emits-change writable .MemoryAttributes property y 2 emits-change writable .MemoryConfiguredSpeedInMhz property q 4800 emits-change writable .MemoryDataWidth property q 64 emits-change writable .MemoryDeviceLocator property s "P0 CHANNEL A DIMM0" emits-change writable .MemoryMedia property s "xyz.openbmc_project.Inventory.Item.D... emits-change writable .MemorySizeInKB property t 33554432 emits-change writable .MemoryTotalWidth property q 0 emits-change writable ... ```
Change-Id: I205de7df72269e472143ea3a3fc2f6f9e4af56ee Signed-off-by: Joseph Fu <joseph.fu@quantatw.com>
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b8c4f337 | 21-Mar-2023 |
Patrick Williams <patrick@stwcx.xyz> |
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are for: * bus_t * exception_t * manager_t * match_t * message_t * object_t * slot_t
Change-Id: Ib0d2666217b7fd0e3621e16557dd44ae0c35598a Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
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cb0d2740 | 13-Mar-2023 |
Jonathan Doman <jonathan.doman@intel.com> |
sst: Add emr support in sst_mailbox backend
Change-Id: I1192c61827dc573bc0a13cb81a164e37ccb78ca9 Signed-off-by: Jonathan Doman <jonathan.doman@intel.com> |
b4c3bcd7 | 09-Mar-2023 |
Jonathan Doman <jonathan.doman@intel.com> |
sst: Prefer cached values over default values
In anticipation of support for future CPUs, change some assumptions: * When host is off, return cached property values instead of "default" values. CP
sst: Prefer cached values over default values
In anticipation of support for future CPUs, change some assumptions: * When host is off, return cached property values instead of "default" values. CPUs may not guarantee support for level 0, so there is no universal default. * Must always check the backend interface is ready before using it. * Rename numLevels() to maxLevel() since there may be discontinuities in the supported levels. * Also add some more debug prints.
Tested: * On CPU that supports level 0 - verified that output of sst-info.sh script was the same before and after these changes. * On a CPU that only supports level 4 - verified that when host was powered off, the AppliedConfig showed config4 (valid) instead of config0 (invalid).
Change-Id: Idffcb9a6534ba32760f6d6b2ac244f47427995ea Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
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dd1811c9 | 14-Mar-2023 |
Nikhil Namjoshi <nikhilnamjoshi@google.com> |
Add dbus match rule to detect motherboard object creation
In some rare cases, it is observed that the smbios table is received by smbiosmdr daemon way before Entity Manager creates the motherboard o
Add dbus match rule to detect motherboard object creation
In some rare cases, it is observed that the smbios table is received by smbiosmdr daemon way before Entity Manager creates the motherboard object path. When that happens, smbios daemon creates dbus objects for the cpus but fails to associate them with the chassis. This causes missing "Processors" and "Memory" sections under "Links" in the chassis response.
The issue can be easily reproduced by rebooting just the BMC without rebooting the host node.
The fix is to setup a dbus matcher when the motherboard path is not found. The matcher shall look for the event when xyz.openbmc_project.Inventory.Item.System interface is added to the dbus object.
Tested:
Tried rebooting the bmc multiple times and verified that post reboot, the "Processors" and "Memory" sections are visible under "Links" section in the Chassis response
``` { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>", "@odata.type": "#Chassis.v1_17_0.Chassis", "Actions": { "#Chassis.Reset": { "@Redfish.ActionInfo": "/redfish/v1/Chassis/<Chassis Name>/ResetActionInfo", "target": "/redfish/v1/Chassis/<Chassis Name>/Actions/Chassis.Reset" } }, "Assembly": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/Assembly" }, "ChassisType": ".....", "Id": "<Chassis Name>", "Links": { "Cables": [ { .... } ], "Cables@odata.count": .., "ComputerSystems": [ { "@odata.id": "/redfish/v1/Systems/system" } ], "Contains": [ ....... ], "Contains@odata.count": .., "ManagedBy": [ { "@odata.id": "/redfish/v1/Managers/bmc" } ], "Processors": [ <<==== Processor section is present { "@odata.id": "/redfish/v1/Systems/system/Processors/cpu0" }, { "@odata.id": "/redfish/v1/Systems/system/Processors/cpu1" }, { "@odata.id": "/redfish/v1/Systems/system/Processors/cpu2" }, ..... ], "Processors@odata.count": .. }, "LogServices": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/LogServices" }, "Manufacturer": ".....", "Memory": { <<==== Memory section is present "@odata.id": "/redfish/v1/Systems/system/Memory" }, "Model": ".....", "Name": "<Chassis Name>", "PCIeDevices": { "@odata.id": "/redfish/v1/Systems/system/PCIeDevices" }, "PartNumber": ".....", "Power": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/Power" }, "PowerState": "On", "PowerSubsystem": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/PowerSubsystem" }, "Sensors": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/Sensors" }, "SerialNumber": ".....", "Status": { "Health": "OK", "HealthRollup": "OK", "State": "Enabled" }, "Thermal": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/Thermal" }, "ThermalSubsystem": { "@odata.id": "/redfish/v1/Chassis/<Chassis Name>/ThermalSubsystem" } } ```
Change-Id: I58b514c9e845d64770fa6f946493222a011a2018 Signed-off-by: Nikhil Namjoshi <nikhilnamjoshi@google.com>
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39cc3683 | 14-Mar-2023 |
Tom Tung <shes050117@gmail.com> |
dimm: use size to determine if DIMM is present and functional
Currently, we are using "NO DIMM" in dimmManufacturer to determine if there is a DIMM sensor or not. However, it's "Unknown" in an AMD m
dimm: use size to determine if DIMM is present and functional
Currently, we are using "NO DIMM" in dimmManufacturer to determine if there is a DIMM sensor or not. However, it's "Unknown" in an AMD machine we are testing.
Looking into SMBIOS spec (DSP0134_3.3.0), it looks like using size to determine if DIMM is present and functional is a better option.
Tested: Check an Intel CPU machine and the Present is true when DIMM is there and false when it's not: ``` busctl introspect xyz.openbmc_project.Smbios.MDR_V2 \ /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm0 \ xyz.openbmc_project.Inventory.Item NAME TYPE SIGNATURE RESULT/VALUE FLAGS .Present property b true emits-change writable .PrettyName property s "" emits-change writable
busctl introspect xyz.openbmc_project.Smbios.MDR_V2 \ /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm1 \ xyz.openbmc_project.Inventory.Item NAME TYPE SIGNATURE RESULT/VALUE FLAGS .Present property b false emits-change writable .PrettyName property s "" emits-change writable ``` Check an AMD machine and it works fine with a bad DIMM and a good DIMM: ``` busctl introspect xyz.openbmc_project.Smbios.MDR_V2 /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm0 xyz.openbmc_project.Inventory.Item NAME TYPE SIGNATURE RESULT/VALUE FLAGS .Present property b false emits-change writable .PrettyName property s "" emits-change writable
busctl introspect xyz.openbmc_project.Smbios.MDR_V2 /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm1 xyz.openbmc_project.Inventory.Item NAME TYPE SIGNATURE RESULT/VALUE FLAGS .Present property b true emits-change writable .PrettyName property s "" emits-change writable ```
Change-Id: If6ea55f35b4af3225c4a07de481d930fa461b3e7 Signed-off-by: Tom Tung <shes050117@gmail.com>
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efd41540 | 13-Dec-2022 |
John Edward Broadbent <jebr@google.com> |
Add config to allow DIMM only in Location Code
This change creates an option that excludes the bank number from the location code. This addresses issues from [1] that changed the location format, br
Add config to allow DIMM only in Location Code
This change creates an option that excludes the bank number from the location code. This addresses issues from [1] that changed the location format, breaking previous assumptions related to location codes.
This command was used the validate the format of the location code. ''' $ busctl introspect "xyz.openbmc_project.Smbios.MDR_V2" /xyz/openbmc_project/inventory/system/chassis/motherboard/dimm4 ... xyz.openbmc_project.Inventory.Decorator.LocationCode interface - - - .LocationCode property s "DIMM2" emits-change ```
[1] https://github.com/openbmc/smbios-mdr/commit/744b35aad0051084c7b71fee8898d1e496345270
Signed-off-by: John Edward Broadbent <jebr@google.com> Change-Id: I3b1e219aabba20c0031bfe78bad17887cf05715c
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966fcb10 | 26-Nov-2022 |
Patrick Williams <patrick@stwcx.xyz> |
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are for: * bus_t * exception_t * manager_t * match_t * message_t * object_t * slot_t
Change-Id: I5d9984f2642be11be6255f8adbf4586dd8f05a40 Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
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bb9c622d | 03-Nov-2022 |
Gobinath Krishnamoorthy <gobinathk@google.com> |
Use mobo's object system iface to find mobo path.
This change use system interface to find the inventory object path of the root board in the system. This replaces the `ReScan` method to get the roo
Use mobo's object system iface to find mobo path.
This change use system interface to find the inventory object path of the root board in the system. This replaces the `ReScan` method to get the root object path. The `ReScan` implementation in EntityManager never upstreamed and that CL was abandoned. CL: https://gerrit.openbmc.org/c/openbmc/entity-manager/+/46128
TESTED:
busctl get-property xyz.openbmc_project.Smbios.MDR_V2 \ > /xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0 \ > xyz.openbmc_project.Association.Definitions Associations a(sss) 1 "chassis" "processors" "/xyz/openbmc_project/inventory/system/board/motherboard"
busctl get-property xyz.openbmc_project.Smbios.MDR_V2 \ > /xyz/openbmc_project/inventory/system/chassis/motherboard/cpu1 \ > xyz.openbmc_project.Association.Definitions Associations a(sss) 1 "chassis" "processors" "/xyz/openbmc_project/inventory/system/board/motherboard"
busctl --verbose get-property xyz.openbmc_project.ObjectMapper \ /xyz/openbmc_project/inventory/system/board/motherboard/processors \ xyz.openbmc_project.Association endpoints ARRAY "s" { STRING "/xyz/openbmc_project/inventory/system/chassis/motherboard/cpu0"; STRING "/xyz/openbmc_project/inventory/system/chassis/motherboard/cpu1"; };
Signed-off-by: Gobinath Krishnamoorthy <gobinathk@google.com> Change-Id: Idc6f8c58324c7618a2c4c5a2c4079599c7c29cf4
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744b35aa | 02-Nov-2022 |
Konstantin Aladyshev <aladyshev22@gmail.com> |
Utilize 'Bank Locator' memory device table field
SMBIOS specification defines the following fields in the 'Memory Device (Type 17)' table:
''' Device Locator String number of the string that identi
Utilize 'Bank Locator' memory device table field
SMBIOS specification defines the following fields in the 'Memory Device (Type 17)' table:
''' Device Locator String number of the string that identifies the physically-labeled socket or board position where the memory device is located. EXAMPLE: "DIMM 0"
Bank Locator String number of the string that identifies the physically labeled bank where the memory device is located. EXAMPLE: "Bank 0" or "A" '''
Currently smbios-mdr uses only 'Device Locator' field for the 'Dimm::MemoryDeviceLocator' value. Utilize both 'Bank Locator' and 'Device Locator' fields to construct more complete locator value.
Tested: Tested on the AMD EthanolX board. Example of the locator fields in one of the Type 17 tables: Bank Locator: "P0 CHANNEL A", Device Locator: "DIMM 0".
Before the patch "MemoryDeviceLocator" property on the "xyz.openbmc_project.Inventory.Item.Dimm" interface is equal to the "DIMM 0". After the patch it is equal to the "P0 CHANNEL A DIMM 0".
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com> Change-Id: I0e4913b8ac0639a9549c217ca9dfbfe34ea82c68
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7393e48d | 19-Sep-2022 |
Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> |
Fix - BIOS version on Redfish
Even though SMBIOS populating bios_active version, Set BIOS ID IPMI command is failing to set the bios_active version. This change support to populate bios_acvite versi
Fix - BIOS version on Redfish
Even though SMBIOS populating bios_active version, Set BIOS ID IPMI command is failing to set the bios_active version. This change support to populate bios_acvite version on BMC.
Tested: Verified using Redfish and EWS. BIOS version populated as expected.
Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> Change-Id: If9df1297e7289847ca0e57cbadf128112eeced92
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1e1ca736 | 21-Sep-2022 |
Jason M. Bills <jason.m.bills@intel.com> |
Add missing include for boost::flat_map
A recent update to sdbusplus exposed a missing include. This adds the include to fix the build.
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com> Chang
Add missing include for boost::flat_map
A recent update to sdbusplus exposed a missing include. This adds the include to fix the build.
Signed-off-by: Jason M. Bills <jason.m.bills@intel.com> Change-Id: I7db08ff8c85fa2dcf234ff42956b68c6ca6eb0e4
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2eca4fe5 | 17-Aug-2022 |
kasunath <kasunath@google.com> |
Expose memory error correction type
Memory error correction types are provided by smbios table type-16. This change use that table to populate 'ECC' field in xyz.openbmc_project.Inventory.Item.Dimm
Expose memory error correction type
Memory error correction types are provided by smbios table type-16. This change use that table to populate 'ECC' field in xyz.openbmc_project.Inventory.Item.Dimm interface.
Tested: Tested this on a real machine.
Signed-off-by: Kasun Athukorala <kasunath@google.com> Change-Id: Iaeb27f81d9b97be1858d1c4564318f5dc69cfa4f
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634ec6ae | 25-Jul-2022 |
kasunath <kasunath@google.com> |
Remove trailing spaces in PartNumber
Sometime PartNumber can contain trailing spaces. This is unnecessary and can cause issues when trying to compare with this field. This change will remove trailin
Remove trailing spaces in PartNumber
Sometime PartNumber can contain trailing spaces. This is unnecessary and can cause issues when trying to compare with this field. This change will remove trailing whitespaces if any.
Tested: Verified on a machine that the part number doesn't contain any trailing white spaces with this change.
Signed-off-by: Kasun Athukorala <kasunath@google.com> Change-Id: I271c9f527f98fbb79493cfe3715b421b44996a91
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19849573 | 13-Jun-2022 |
Jiaqing Zhao <jiaqing.zhao@intel.com> |
cpu: Set DBus EffectiveFamily property
According to the phosphor-dbus-interfaces yaml file, EffectiveFamily is the raw value of the Processor Family in SMBIOS Processor Information structure defined
cpu: Set DBus EffectiveFamily property
According to the phosphor-dbus-interfaces yaml file, EffectiveFamily is the raw value of the Processor Family in SMBIOS Processor Information structure defined in DSP0134 section 7.5.2. This patch sets that value on DBus.
Tested: Verified the value of EffectiveFamily matches the value in SMBIOS table
Change-Id: I9b2274e9fc263d6550fd48e33c7ad233c910b1c1 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@intel.com>
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77b9c478 | 22-Jul-2022 |
Patrick Williams <patrick@stwcx.xyz> |
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are
sdbusplus: use shorter type aliases
The sdbusplus headers provide shortened aliases for many types. Switch to using them to provide better code clarity and shorter lines. Possible replacements are for: * bus_t * exception_t * manager_t * match_t * message_t * object_t * slot_t
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: Ibc88a5de1e7a11d332410985f29698b24aeae983
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06639639 | 14-Jun-2022 |
Jonathan Doman <jonathan.doman@intel.com> |
cpuinfoapp: sst: Disallow BaseSpeedPriorityEnabled writes
The flow for dynamic OOB enabling of SST-BF is not working, so we need to return errors if a user tries to modify BaseSpeedPriorityEnabled i
cpuinfoapp: sst: Disallow BaseSpeedPriorityEnabled writes
The flow for dynamic OOB enabling of SST-BF is not working, so we need to return errors if a user tries to modify BaseSpeedPriorityEnabled instead of letting them get into an unsupported configuration.
Change-Id: I3a1d0162ce31db66a1a7d05e4a2a89827b5277f8 Signed-off-by: Jonathan Doman <jonathan.doman@intel.com>
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49ea830e | 26-May-2022 |
Jonathan Doman <jonathan.doman@intel.com> |
sst: Rediscover profiles after host reboot
In some cases, host processor reboot may change the static SST-PP profile information. This commit adds ability to register callbacks to run upon hostState
sst: Rediscover profiles after host reboot
In some cases, host processor reboot may change the static SST-PP profile information. This commit adds ability to register callbacks to run upon hostState changes, and reruns SST discovery whenever the host exits the power-off state.
Tested: - Ran tools/sst-compare-redfish-os.py tool on platform with SPR host CPU, and observed no mismatches before and after a host reboot. - Confirmed Redfish OperatingConfig properties still populated when host is off.
Signed-off-by: Jonathan Doman <jonathan.doman@intel.com> Change-Id: I9e7b0ebb8c5ec7a8464346f3476490b765579428
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