trace: split out trace events for hw/char/ directory

Move all trace-events for files in the hw/char/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id:

trace: split out trace events for hw/char/ directory

Move all trace-events for files in the hw/char/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-9-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for hw/block/ directory

Move all trace-events for files in the hw/block/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-i

trace: split out trace events for hw/block/ directory

Move all trace-events for files in the hw/block/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-8-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for block/ directory

Move all trace-events for files in the block/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 146

trace: split out trace events for block/ directory

Move all trace-events for files in the block/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-7-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for migration/ directory

Move all trace-events for files in the migration/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message

trace: split out trace events for migration/ directory

Move all trace-events for files in the migration/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-6-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for io/ directory

Move all trace-events for files in the io/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 146606642

trace: split out trace events for io/ directory

Move all trace-events for files in the io/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-5-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for crypto/ directory

Move all trace-events for files in the crypto/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1

trace: split out trace events for crypto/ directory

Move all trace-events for files in the crypto/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-4-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: split out trace events for util/ directory

Move all trace-events for files in the util/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 14660

trace: split out trace events for util/ directory

Move all trace-events for files in the util/ directory to
their own file.

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id: 1466066426-16657-3-git-send-email-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

trace: [all] Add "guest_mem_before" event

The event is described in "trace-events". Note that the "MO_AMASK" flag
is not traced, since it does not seem to affect the visible semantics of
instruction

trace: [all] Add "guest_mem_before" event

The event is described in "trace-events". Note that the "MO_AMASK" flag
is not traced, since it does not seem to affect the visible semantics of
instructions.

[s/inline inline/inline/ to fix clang build.
--Stefan]

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 146549350711.18437.726780393247474362.stgit@fimbulvetr.bsc.es
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160617' into staging

target-arm queue:
* GICv3 emulation

# gpg: Signature made Fri 17 Jun 2016 15:24:28 BST
# gpg:

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160617' into staging

target-arm queue:
* GICv3 emulation

# gpg: Signature made Fri 17 Jun 2016 15:24:28 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20160617: (22 commits)
ACPI: ARM: Present GIC version in MADT table
hw/timer: Add value matching support to aspeed_timer
target-arm/monitor.c: Advertise emulated GICv3 in capabilities
target-arm/machine.c: Allow user to request GICv3 emulation
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
hw/intc/arm_gicv3: Implement gicv3_set_irq()
hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
hw/intc/arm_gicv3: Implement GICv3 distributor registers
hw/intc/arm_gicv3: Implement functions to identify next pending irq
hw/intc/arm_gicv3: ARM GICv3 device framework
hw/intc/arm_gicv3: Add vmstate descriptors
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
hw/intc/arm_gicv3: Add state information
target-arm: Add mp-affinity property for ARM CPU class
target-arm: Provide hook to tell GICv3 about changes of security state
target-arm: Define new arm_is_el3_or_mon() function
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

hw/intc/arm_gicv3: Add IRQ handling CPU interface registers

Add the CPU interface registers which deal with acknowledging
and dismissing interrupts.

Signed-off-by: Peter Maydell <peter.maydell@lina

hw/intc/arm_gicv3: Add IRQ handling CPU interface registers

Add the CPU interface registers which deal with acknowledging
and dismissing interrupts.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-19-git-send-email-peter.maydell@linaro.org

show more ...

hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers

Implement the registers in the GICv3 CPU interface which generate
new SGI interrupts.

Signed-off-by: Peter Maydell <peter.maydell@linar

hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers

Implement the registers in the GICv3 CPU interface which generate
new SGI interrupts.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-18-git-send-email-peter.maydell@linaro.org

show more ...

hw/intc/arm_gicv3: Implement gicv3_cpuif_update()

Implement the gicv3_cpuif_update() function which deals with correctly
asserting IRQ and FIQ based on the current running priority of the CPU,
the p

hw/intc/arm_gicv3: Implement gicv3_cpuif_update()

Implement the gicv3_cpuif_update() function which deals with correctly
asserting IRQ and FIQ based on the current running priority of the CPU,
the priority of the highest priority pending interrupt and the CPU's
current exception level and security state.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-17-git-send-email-peter.maydell@linaro.org

show more ...

hw/intc/arm_gicv3: Implement GICv3 CPU interface registers

Implement the CPU interface registers for the GICv3; these are
CPU system registers, not MMIO registers.

This commit implements all the re

hw/intc/arm_gicv3: Implement GICv3 CPU interface registers

Implement the CPU interface registers for the GICv3; these are
CPU system registers, not MMIO registers.

This commit implements all the registers which are simple
accessors for GIC state, but not those which act as interfaces
for acknowledging, dismissing or generating interrupts. (Those
will be added in a later commit.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-16-git-send-email-peter.maydell@linaro.org

show more ...

hw/intc/arm_gicv3: Implement gicv3_set_irq()

Implement the code which updates the GIC state when an interrupt
input into the GIC is asserted.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

hw/intc/arm_gicv3: Implement gicv3_set_irq()

Implement the code which updates the GIC state when an interrupt
input into the GIC is asserted.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-15-git-send-email-peter.maydell@linaro.org

show more ...

hw/intc/arm_gicv3: Implement GICv3 redistributor registers

Implement the redistributor registers of a GICv3.

Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com>
Reviewed-by: Shannon Zhao <s

hw/intc/arm_gicv3: Implement GICv3 redistributor registers

Implement the redistributor registers of a GICv3.

Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1465915112-29272-13-git-send-email-peter.maydell@linaro.org
[PMM: significantly overhauled/rewritten:
* use the new data structures
* restructure register read/write to handle different width accesses
natively, since almost all registers are 32-bit only, rather
than implementing everything as byte accesses
* implemented security extension support
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

hw/intc/arm_gicv3: Implement GICv3 distributor registers

Implement the distributor registers of a GICv3.

Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com>
Reviewed-by: Shannon Zhao <shann

hw/intc/arm_gicv3: Implement GICv3 distributor registers

Implement the distributor registers of a GICv3.

Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1465915112-29272-12-git-send-email-peter.maydell@linaro.org
[PMM: significantly overhauled/rewritten:
* use the new bitmap data structures
* restructure register read/write to handle different width accesses
natively, since almost all registers are 32-bit only, rather
than implementing everything as byte accesses
* implemented security extension support
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/amit-migration/tags/migration-for-2.7-5' into staging

Migration:

- many compression/decompression fixes
- trace improvements
- static checker fix for detect

Merge remote-tracking branch 'remotes/amit-migration/tags/migration-for-2.7-5' into staging

Migration:

- many compression/decompression fixes
- trace improvements
- static checker fix for detecting size mismatch in unused fields
- fix VM save after snapshot

# gpg: Signature made Fri 17 Jun 2016 13:59:44 BST
# gpg: using RSA key 0xEB0B4DFC657EF670
# gpg: Good signature from "Amit Shah <amit@amitshah.net>"
# gpg: aka "Amit Shah <amit@kernel.org>"
# gpg: aka "Amit Shah <amitshah@gmx.net>"
# Primary key fingerprint: 48CA 3722 5FE7 F4A8 B337 2735 1E9A 3B5F 8540 83B6
# Subkey fingerprint: CC63 D332 AB8F 4617 4529 6534 EB0B 4DFC 657E F670

* remotes/amit-migration/tags/migration-for-2.7-5:
vmstate-static-checker: fix size mismatch detection in unused fields
migration: code clean up
migration: refine the decompression code
migration: refine the compression code
migration: protect the quit flag by lock
migration: refine ram_save_compressed_page
qemu-file: Fix qemu_put_compression_data flaw
migration: remove useless code
migration: Fix a potential issue
migration: Fix multi-thread compression bug
migration: fix inability to save VM after snapshot
migration: Trace improvements
migration: Don't use *_to_cpup() and cpu_to_*w()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

migration: Trace improvements

A couple of improvements to tracing that have come out of helping
people with migration problems:
* vmstate_n_elems trace the count/name - for when you have problems

migration: Trace improvements

A couple of improvements to tracing that have come out of helping
people with migration problems:
* vmstate_n_elems trace the count/name - for when you have problems
getting array counts right
* vmstate_subsection_load_bad - add the idstr, for when you receive a
subsection you weren't expecting.

Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <1465896986-16132-1-git-send-email-dgilbert@redhat.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches

# gpg: Signature made Thu 16 Jun 2016 15:01:27 BST
# gpg: using RSA key 0x7F09B272C88F

Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches

# gpg: Signature made Thu 16 Jun 2016 15:01:27 BST
# gpg: using RSA key 0x7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6

* remotes/kevin/tags/for-upstream: (39 commits)
hbitmap: add 'pos < size' asserts
iotests: Add test for oVirt-like storage migration
iotests: Add test for post-mirror backing chains
block/null: Implement bdrv_refresh_filename()
block/mirror: Fix target backing BDS
block: Allow replacement of a BDS by its overlay
rbd:change error_setg() to error_setg_errno()
iotests: 095: Clean up QEMU before showing image info
block: Create the commit block job before reopening any image
block: Prevent sleeping jobs from resuming if they have been paused
block: use the block job list in qmp_query_block_jobs()
block: use the block job list in bdrv_drain_all()
block: Fix snapshot=on with aio=native
block: Remove bs->zero_beyond_eof
qcow2: Let vmstate call qcow2_co_preadv/pwrite directly
block: Make bdrv_load/save_vmstate coroutine_fns
block: Allow .bdrv_load/save_vmstate() to return 0/-errno
block: Make .bdrv_load_vmstate() vectored
block: Introduce bdrv_preadv()
doc: Fix mailing list address in tests/qemu-iotests/README
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

block: Byte-based bdrv_co_do_copy_on_readv()

In a first step to convert the common I/O path to work on bytes rather
than sectors, this converts the copy-on-read logic that is used by
bdrv_aligned_pr

block: Byte-based bdrv_co_do_copy_on_readv()

In a first step to convert the common I/O path to work on bytes rather
than sectors, this converts the copy-on-read logic that is used by
bdrv_aligned_preadv().

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

qcow2: Implement .bdrv_co_pwritev()

This changes qcow2 to implement the byte-based .bdrv_co_pwritev
interface rather than the sector-based old one.

As preallocation uses the same allocation functio

qcow2: Implement .bdrv_co_pwritev()

This changes qcow2 to implement the byte-based .bdrv_co_pwritev
interface rather than the sector-based old one.

As preallocation uses the same allocation function as normal writes, and
the interface of that function needs to be changed, it is converted in
the same patch.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160614' into staging

More s390x patches, this time mostly dealing with channel I/O:
Bugfixes and cleanups, and dequeue pending interrupts af

Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160614' into staging

More s390x patches, this time mostly dealing with channel I/O:
Bugfixes and cleanups, and dequeue pending interrupts after
machine checks.

# gpg: Signature made Tue 14 Jun 2016 13:09:43 BST
# gpg: using RSA key 0xDECF6B93C6F02FAF
# gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20160614:
s390x/kvm: Fixup interrupt type for non-adapter I/O interrupts
s390x: Limit s390-ccw machines to 248 CPUs
virtio-ccw: Provide traces for indicator changes
s390x/css: introduce property type for device ids
s390x/css: clear IO irqs when generating IPI CRW
s390x/kvm: add interface for clearing IO irqs
linux-headers: update

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

virtio-ccw: Provide traces for indicator changes

This allows to trace changes in the summary and queue indicators
for the non-irqfd case. For irqfd, kernel traces are needed instead.

Signed-off-by:

virtio-ccw: Provide traces for indicator changes

This allows to trace changes in the summary and queue indicators
for the non-irqfd case. For irqfd, kernel traces are needed instead.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>

show more ...

Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches

# gpg: Signature made Wed 08 Jun 2016 09:31:38 BST
# gpg: using RSA key 0x7F09B272C88F

Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches

# gpg: Signature made Wed 08 Jun 2016 09:31:38 BST
# gpg: using RSA key 0x7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"

* remotes/kevin/tags/for-upstream: (31 commits)
qemu-img bench: Add --flush-interval
qemu-img bench: Implement -S (step size)
qemu-img bench: Make start offset configurable
qemu-img bench: Sequential writes
qemu-img bench
block: Don't emulate natively supported pwritev flags
blockdev: clean up error handling in do_open_tray
block: Fix bdrv_all_delete_snapshot() error handling
qcow2: avoid extra flushes in qcow2
raw-posix: Fetch max sectors for host block device
block: assert that bs->request_alignment is a power of 2
migration/block: Convert saving to BlockBackend
migration/block: Convert load to BlockBackend
block: Kill bdrv_co_write_zeroes()
vmdk: Convert to bdrv_co_pwrite_zeroes()
raw_bsd: Convert to bdrv_co_pwrite_zeroes()
raw-posix: Convert to bdrv_co_pwrite_zeroes()
qed: Convert to bdrv_co_pwrite_zeroes()
gluster: Convert to bdrv_co_pwrite_zeroes()
blkreplay: Convert to bdrv_co_pwrite_zeroes()
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

raw-posix: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based
interfaces.

Signed-off-by: Eric Blake <eblake@redhat.com>
[ kwolf: Fixed up trace_paio_sub

raw-posix: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based
interfaces.

Signed-off-by: Eric Blake <eblake@redhat.com>
[ kwolf: Fixed up trace_paio_submit_co() call for qiov == NULL ]
Signed-off-by: Kevin Wolf <kwolf@redhat.com>

show more ...