#
13d885b0 |
| 22-Aug-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync.
Reported-by:
tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32
Replace the separate defines with TCG_TARGET_HAS_extr_i64_i32, so that the two parts of backend-specific type changing cannot be out of sync.
Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: <20230822175127.1173698-1-richard.henderson@linaro.org>
show more ...
|
Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0, v6.1.0 |
|
#
c914d46d |
| 18-Feb-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
The virtio devices require proper memory ordering between the vcpus and the iothreads.
Reviewed-by: Philippe Mathieu-Daudé <philmd@
tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
The virtio devices require proper memory ordering between the vcpus and the iothreads.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
cac9b0fd |
| 01-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Remove target-specific headers from tcg.[ch]
This finally paves the way for tcg/ to be built once per mode.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Hende
tcg: Remove target-specific headers from tcg.[ch]
This finally paves the way for tcg/ to be built once per mode.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
ad3d0e4d |
| 28-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split tcg/tcg-op-common.h from tcg/tcg-op.h
Create tcg/tcg-op-common.h, moving everything that does not concern TARGET_LONG_BITS or TCGv. Adjust tcg/*.c to use the new header instead of tcg-op
tcg: Split tcg/tcg-op-common.h from tcg/tcg-op.h
Create tcg/tcg-op-common.h, moving everything that does not concern TARGET_LONG_BITS or TCGv. Adjust tcg/*.c to use the new header instead of tcg-op.h, in preparation for compiling tcg/ only once.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
a1429ca2 |
| 15-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out memory ops to tcg-op-ldst.c
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
#
12fde9bc |
| 06-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add INDEX_op_qemu_{ld,st}_i128
Add opcodes for backend support for 128-bit memory operations.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@
tcg: Add INDEX_op_qemu_{ld,st}_i128
Add opcodes for backend support for 128-bit memory operations.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
7b880107 |
| 19-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce tcg_target_has_memory_bswap
Replace the unparameterized TCG_TARGET_HAS_MEMORY_BSWAP macro with a function with a memop argument.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
tcg: Introduce tcg_target_has_memory_bswap
Replace the unparameterized TCG_TARGET_HAS_MEMORY_BSWAP macro with a function with a memop argument.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
35c653c4 |
| 15-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add 128-bit guest memory primitives
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
#
10588491 |
| 15-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Drop plugin_gen_disable_mem_helpers from tcg_gen_exit_tb
Now that we call qemu_plugin_disable_mem_helpers in cpu_tb_exec, we don't need to do this in generated code as well.
Signed-off-by: Ric
tcg: Drop plugin_gen_disable_mem_helpers from tcg_gen_exit_tb
Now that we call qemu_plugin_disable_mem_helpers in cpu_tb_exec, we don't need to do this in generated code as well.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230310195252.210956-3-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230315174331.2959-13-alex.bennee@linaro.org> Reviewed-by: Emilio Cota <cota@braap.org>
show more ...
|
#
f04de891 |
| 26-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Replace tcg_const_i64 in tcg-op.c
These three instances got missed in previous conversion.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.hen
tcg: Replace tcg_const_i64 in tcg-op.c
These three instances got missed in previous conversion.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
47f7313d |
| 25-Feb-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Create tcg/tcg-temp-internal.h
Move the tcg_temp_free_* and tcg_temp_ebb_new_* declarations and inlines to the new header. These are private to the implementation, and will prevent tcg_temp_fr
tcg: Create tcg/tcg-temp-internal.h
Move the tcg_temp_free_* and tcg_temp_ebb_new_* declarations and inlines to the new header. These are private to the implementation, and will prevent tcg_temp_free_* from creeping back into the guest front ends.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
f85b1fc4 |
| 03-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Link branches to the labels
This allows us to easily find all branches that use a label. Since 'refs' is only tested vs zero, remove it and test for an empty list instead. Drop the use of bitf
tcg: Link branches to the labels
This allows us to easily find all branches that use a label. Since 'refs' is only tested vs zero, remove it and test for an empty list instead. Drop the use of bitfields, which had been used to pack refs into a single 32-bit word.
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
5dd48602 |
| 29-Jan-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Use tcg_temp_ebb_new_* in tcg/
All of these have obvious and quite local scope.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@lina
tcg: Use tcg_temp_ebb_new_* in tcg/
All of these have obvious and quite local scope.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
d1beee4d |
| 10-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}
Normally this is automatically handled by the CF_PARALLEL checks with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special case of !PREFIX_LOCK
tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}
Normally this is automatically handled by the CF_PARALLEL checks with in tcg_gen_atomic_cmpxchg_i{32,64}, but x86 has a special case of !PREFIX_LOCK where it always wants the non-atomic version.
Split these out so that x86 does not have to roll its own.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
123ae568 |
| 08-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add tcg_gen_{non}atomic_cmpxchg_i128
This will allow targets to avoid rolling their own.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.or
tcg: Add tcg_gen_{non}atomic_cmpxchg_i128
This will allow targets to avoid rolling their own.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
cb48f365 |
| 07-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add guest load/store primitives for TCGv_i128
These are not yet considering atomicity of the 16-byte value; this is a direct replacement for the current target code which uses a pair of 8-byte
tcg: Add guest load/store primitives for TCGv_i128
These are not yet considering atomicity of the 16-byte value; this is a direct replacement for the current target code which uses a pair of 8-byte operations.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
4771e71c |
| 19-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add basic data movement for TCGv_i128
Add code generation functions for data movement between TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract).
Reviewed-by: Alex Bennée <alex.bennee@lina
tcg: Add basic data movement for TCGv_i128
Add code generation functions for data movement between TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract).
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
9fd86b51 |
| 13-Jan-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Avoid recursion in tcg_gen_mulu2_i32
We have a test for one of TCG_TARGET_HAS_mulu2_i32 or TCG_TARGET_HAS_muluh_i32 being defined, but the test became non-functional when we changed to always d
tcg: Avoid recursion in tcg_gen_mulu2_i32
We have a test for one of TCG_TARGET_HAS_mulu2_i32 or TCG_TARGET_HAS_muluh_i32 being defined, but the test became non-functional when we changed to always define all of these macros.
Replace this with a build-time test in tcg_gen_mulu2_i32.
Fixes: 25c4d9cc845 ("tcg: Always define all of the TCGOpcode enum members.") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1435 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
b7e4afbd |
| 26-Nov-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add gen_tb to TCGContext
This can replace four other variables that are references into the TranslationBlock structure.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard
tcg: Add gen_tb to TCGContext
This can replace four other variables that are references into the TranslationBlock structure.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
d4478943 |
| 18-Dec-2022 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()
In order to have variable size allocated TCGOp, pass the number of arguments we use (and would allocate) up to tcg_op_alloc().
Thi
tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()
In order to have variable size allocated TCGOp, pass the number of arguments we use (and would allocate) up to tcg_op_alloc().
This alters tcg_emit_op(), tcg_op_insert_before() and tcg_op_insert_after() prototypes.
In tcg_op_alloc() ensure the number of arguments is in range.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Extracted from bigger patch] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221218211832.73312-2-philmd@linaro.org>
show more ...
|
#
d56fea79 |
| 16-Oct-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move TCG_{LOW,HIGH} to tcg-internal.h
Move the error-generating fallback from tcg-op.c, and replace "_link_error" with modern QEMU_ERROR markup.
Reviewed-by: Philippe Mathieu-Daudé <philmd@lin
tcg: Move TCG_{LOW,HIGH} to tcg-internal.h
Move the error-generating fallback from tcg-op.c, and replace "_link_error" with modern QEMU_ERROR markup.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
46be8425 |
| 28-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Implement tcg_gen_{h,w}swap_{i32,i64}
Swap half-words (16-bit) and words (32-bit) within a larger value. Mirrors functions of the same names within include/qemu/bitops.h.
Signed-off-by: Richar
tcg: Implement tcg_gen_{h,w}swap_{i32,i64}
Swap half-words (16-bit) and words (32-bit) within a larger value. Mirrors functions of the same names within include/qemu/bitops.h.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: David Miller <dmiller423@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-5-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
show more ...
|
#
e03b5686 |
| 23-Mar-2022 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
Replace config-time define HOST_WORDS_BIGENDIAN
Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoid
Replace config-time define HOST_WORDS_BIGENDIAN
Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before.
This can help to make some code independent from qemu too.
gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
show more ...
|
#
c51e5100 |
| 04-Feb-2022 |
Alex Bennée <alex.bennee@linaro.org> |
tracing: remove TCG memory access tracing
If you really want to trace all memory operations TCG plugins gives you a more flexible interface for doing so.
Signed-off-by: Alex Bennée <alex.bennee@lin
tracing: remove TCG memory access tracing
If you really want to trace all memory operations TCG plugins gives you a more flexible interface for doing so.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Luis Vilanova <vilanova@imperial.ac.uk> Cc: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20220204204335.1689602-19-alex.bennee@linaro.org>
show more ...
|
#
76e366e7 |
| 04-Aug-2021 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Canonicalize alignment flags in MemOp
Having observed e.g. al8+leq in dumps, canonicalize to al+leq.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <ric
tcg: Canonicalize alignment flags in MemOp
Having observed e.g. al8+leq in dumps, canonicalize to al+leq.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|