a5cfc223 | 19-May-2017 |
Richard Henderson <rth@twiddle.net> |
target/s390x: Move helper_ex to end of file
This will avoid needing forward declarations in following patches.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <r
target/s390x: Move helper_ex to end of file
This will avoid needing forward declarations in following patches.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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fbe8202e | 31-May-2017 |
David Hildenbrand <david@redhat.com> |
s390x/cpumodel: improve defintion search without an IBC
Currently, under z/VM on a 0x2827, QEMU will detect a 0x2828 if no IBC value is provided. QEMU will simply take the last model of that HW gene
s390x/cpumodel: improve defintion search without an IBC
Currently, under z/VM on a 0x2827, QEMU will detect a 0x2828 if no IBC value is provided. QEMU will simply take the last model of that HW generation, which happens to be the BC version.
Let's improve our search for that case by selecting the latest CPU definition that matches the CPU type. This for example will avoid detecting an z13 as a z13s.
We might still detect a GA2 version on a GA1 system, but as we don't have further information at hand, there isn't too much we can do about it. The alternative of always presenting the oldest GA is not backward compatible, e.g: You're running on 0x2827 GA2. Old QEMU version indicated "0x2828 GA1 == 0x2827 GA2". After you updated QEMU, you suddenly detect "0x2827 GA1". You're previous libvirt guest might suddenly refuse to run.
In the end presenting a newer GA level does not matter because:
1: All GAX models share the same base feature set. A GAX++ might support "more features". 2: Without an IBC, the guest can't detect the GA version.
If we have no IBC (esp. unblocked_ibc == 0), the IBC we will present to the guest in read_SCP_info() will be 0. The guest will not know which GA version it has. The problem of missing IBC propagates.
If we don't have a feature of the GA++ version, also our guest won't have it. So in summary, the guest also has no idea of its GA version.
Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170531193434.6918-3-david@redhat.com> Acked-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [improve patch description by reusing mailing list discussion]
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64bc98f4 | 31-May-2017 |
David Hildenbrand <david@redhat.com> |
s390x/cpumodel: take care of the cpuid format bit for KVM
Let's also properly forward that bit. It should always be set. I verified it under z/VM, it seems to be always set there. For now, zKVM gues
s390x/cpumodel: take care of the cpuid format bit for KVM
Let's also properly forward that bit. It should always be set. I verified it under z/VM, it seems to be always set there. For now, zKVM guests never get that bit set when the CPU model is active.
The PoP mentiones, that z800 + z900 (HW generation 7) always set this bit to 0, so let's take care of that.
Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170531193434.6918-2-david@redhat.com> Acked-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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cb4f4bc3 | 12-May-2017 |
Christian Borntraeger <borntraeger@de.ibm.com> |
s390/kvm: do not reset riccb on initial cpu reset
The riccb is kept unchanged during initial cpu reset. Move the data structure to the other registers that are unchanged.
Signed-off-by: Christian B
s390/kvm: do not reset riccb on initial cpu reset
The riccb is kept unchanged during initial cpu reset. Move the data structure to the other registers that are unchanged.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
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538fad59 | 09-May-2017 |
Aurelien Jarno <aurelien@aurel32.net> |
target/s390x: implement serialization in BRANCH CONDITION
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170509082800.10756-4-aurelien@aurel32.net> Signed-off-by: Richard Hender
target/s390x: implement serialization in BRANCH CONDITION
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170509082800.10756-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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1e8e69f0 | 09-May-2017 |
Aurelien Jarno <aurelien@aurel32.net> |
target/s390x: fix SIGNAL PROCESSOR return value
The SIGNAL PROCESSOR helper returns its value through the CC register. set_cc_static should be called just after the helper.
Signed-off-by: Aurelien
target/s390x: fix SIGNAL PROCESSOR return value
The SIGNAL PROCESSOR helper returns its value through the CC register. set_cc_static should be called just after the helper.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170509082800.10756-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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a7c1fadf | 09-May-2017 |
Aurelien Jarno <aurelien@aurel32.net> |
target/s390x: mask the SIGP order_code using SIGP_ORDER_MASK
For that move the definition from kvm.c to cpu.h
Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@d
target/s390x: mask the SIGP order_code using SIGP_ORDER_MASK
For that move the definition from kvm.c to cpu.h
Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170509082800.10756-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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1807aaa5 | 28-Feb-2017 |
Eric Bischoff <ebischoff@nerim.net> |
target/s390x: Implement LOAD PAIR DISJOINT
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Eric Bischoff <ebischoff@nerim.net> Message-Id: <20170228120134.7921-1-ebischoff@suse.com
target/s390x: Implement LOAD PAIR DISJOINT
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Eric Bischoff <ebischoff@nerim.net> Message-Id: <20170228120134.7921-1-ebischoff@suse.com> [rth: Combine the two via insn->data; free the address temps.] Signed-off-by: Richard Henderson <rth@twiddle.net>
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