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Revision tags: v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35 |
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| #
cf8ae446 |
| 21-Apr-2020 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
arm64: dts: renesas: Fix IOMMU device node names
Fix IOMMU device node names as "iommu@".
Fixes: 8f507babc617 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e58be ("arm64:
arm64: dts: renesas: Fix IOMMU device node names
Fix IOMMU device node names as "iommu@".
Fixes: 8f507babc617 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e58be ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes")
Fixes: 6c7e02178e8f ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes")
Fixes: 3b7e7848f0e8 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes")
Fixes: e4b9a493df45 ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes")
Fixes: 389baa409617 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes")
Fixes: 55697cbb44e4 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes")
Fixes: ce3b52a1595b ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Fixes: a3901e7398e1 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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|
Revision tags: v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21 |
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| #
721b7619 |
| 18-Feb-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: rzg2: Add reset control properties for display
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, ther
arm64: dts: renesas: rzg2: Add reset control properties for display
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be
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|
Revision tags: v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9 |
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| #
03abfdd3 |
| 05-Nov-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"
The Renesas-specific "vsps" property lacks a vendor prefix.
Add a "renesas," prefix to comply with DT best practises.
Signed-off-by:
arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"
The Renesas-specific "vsps" property lacks a vendor prefix.
Add a "renesas," prefix to comply with DT best practises.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20191105183504.21447-4-geert+renesas@glider.be
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| #
9504a9f2 |
| 13-Dec-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties
To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI
arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties
To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI device nodes should
be grouped.
Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
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| #
0aab5b91 |
| 13-Dec-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
arm64: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped. While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property.
Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-7-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
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|
Revision tags: v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3 |
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| #
652fd0f4 |
| 13-Sep-2019 |
Biju Das <biju.das@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add dynamic power coefficient
Describe the dynamic power coefficient of A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-b
arm64: dts: renesas: r8a774c0: Add dynamic power coefficient
Describe the dynamic power coefficient of A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
8438bfda |
| 13-Sep-2019 |
Biju Das <biju.das@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA
Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that suppo
arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA
Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.
Based on the work done by Dien Pham <dien.pham.ry@renesas.com>
and others for r8a77990 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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|
Revision tags: v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2 |
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| #
38290431 |
| 06-Jul-2019 |
Jacopo Mondi <jacopo+renesas@jmondi.org> |
arm64: dts: renesas: Update 'vsps' properties for readability
Update the 'vsps' property in the R-Car Gen3 SoC device tree files to
match what's in the documentation example.
Signed-off-by: Jacopo
arm64: dts: renesas: Update 'vsps' properties for readability
Update the 'vsps' property in the R-Car Gen3 SoC device tree files to
match what's in the documentation example.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
23ad2b46 |
| 21-Aug-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: r8a774c0: Fix register range of display node
Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.
Based on commit 06585ed38b6698bc ("arm64: dt
arm64: dts: renesas: r8a774c0: Fix register range of display node
Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.
Based on commit 06585ed38b6698bc ("arm64: dts: renesas: r8a77990: Fix
register range of display node") for R-Car E3.
Fixes: 8ed3a6b223159df3 ("arm64: dts: renesas: r8a774c0: Add display output support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
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| #
e376df94 |
| 19-Aug-2019 |
Yoshihiro Kaneko <ykaneko0929@gmail.com> |
arm64: dts: renesas: r8a774c0: Sort nodes
Sort nodes.
If node address is present
* Sort by node address, grouping all nodes with the same compat string
and sorting the group alphabetically.
arm64: dts: renesas: r8a774c0: Sort nodes
Sort nodes.
If node address is present
* Sort by node address, grouping all nodes with the same compat string
and sorting the group alphabetically.
Else
* Sort alphabetically
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
a2fe2cd2 |
| 02-Aug-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1
Add the new renesas,companion property to the LVDS0 node to point to the
companion LVDS encoder LVDS1.
Based on similar work from La
arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1
Add the new renesas,companion property to the LVDS0 node to point to the
companion LVDS encoder LVDS1.
Based on similar work from Laurent Pinchart for the r8a7799[05].
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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|
Revision tags: v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10 |
|
| #
e8efd2a8 |
| 14-Jun-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]
Define "assigned-clocks" and "assigned-clock-rates" properties
for CAN[01] DT nodes, as required by the dt-bindings.
Fixes: 03
arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]
Define "assigned-clocks" and "assigned-clock-rates" properties
for CAN[01] DT nodes, as required by the dt-bindings.
Fixes: 036bc85c1d06ef0a ("arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes")
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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|
Revision tags: v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5 |
|
| #
7794bd7e |
| 23-May-2019 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
arm64: dts: renesas: Revise usb2_phy nodes and phys properties
Since the commit 233da2c9ec22 ("dt-bindings: phy: rcar-gen3-phy-usb2:
Revise #phy-cells property") revised the #phy-cells, this patch f
arm64: dts: renesas: Revise usb2_phy nodes and phys properties
Since the commit 233da2c9ec22 ("dt-bindings: phy: rcar-gen3-phy-usb2:
Revise #phy-cells property") revised the #phy-cells, this patch follows
the updated document for R-Car Gen3 and RZ/A2 SoCs.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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|
Revision tags: v5.1.4 |
|
| #
11290c09 |
| 21-May-2019 |
Robin Murphy <robin.murphy@arm.com> |
arm64: dts: renesas: r8a774c0: Clean up CPU compatibles
Apparently this DTS crossed over with commit 31af04cd60d3 ("arm64: dts:
Remove inconsistent use of 'arm,armv8' compatible string") and missed
arm64: dts: renesas: r8a774c0: Clean up CPU compatibles
Apparently this DTS crossed over with commit 31af04cd60d3 ("arm64: dts:
Remove inconsistent use of 'arm,armv8' compatible string") and missed
out on the cleanup, so put it right.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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|
Revision tags: v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16 |
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| #
036bc85c |
| 16-Jan-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes
According to the latest information, clkp2 is available on RZ/G2.
Modify CAN0 and CAN1 nodes accordingly.
Signed-off-by: Fabrizio Castro
arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes
According to the latest information, clkp2 is available on RZ/G2.
Modify CAN0 and CAN1 nodes accordingly.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| #
80bc6dbb |
| 01-Mar-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add CANFD support
The CANFD implementation on the RZ/G2E (a.k.a. r8a774c0) is
identical to the one found on the r8a77990.
Signed-off-by: Fabrizio Castro <fabrizio.cas
arm64: dts: renesas: r8a774c0: Add CANFD support
The CANFD implementation on the RZ/G2E (a.k.a. r8a774c0) is
identical to the one found on the r8a77990.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| #
82ec0092 |
| 10-Mar-2019 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40
The compatible value renesas,rcar-gen3-csi2 was used while prototyping
the R-Car CSI-2 driver but was removed before the driv
arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40
The compatible value renesas,rcar-gen3-csi2 was used while prototyping
the R-Car CSI-2 driver but was removed before the driver was merged.
Fixes: e961ab42e034d469 ("arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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| #
12ce412b |
| 15-Feb-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Fix cpu nodes style
We usually leave a space between "=" and the value of device
tree properties, but unfortunately that was overlooked for the
"clocks" property of cp
arm64: dts: renesas: r8a774c0: Fix cpu nodes style
We usually leave a space between "=" and the value of device
tree properties, but unfortunately that was overlooked for the
"clocks" property of cpu@0 and cpu@1.
This patch fixes the spacing with the "clocks" property of
cpu@0 and cpu@1.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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|
| #
c21cd4ae |
| 21-Feb-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com
arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels
Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
R-Car E3.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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|
| #
2262798c |
| 04-Feb-2019 |
Biju Das <biju.das@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add TMU device nodes
This patch adds TMU{0|1|2|3|4} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <
arm64: dts: renesas: r8a774c0: Add TMU device nodes
This patch adds TMU{0|1|2|3|4} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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|
| #
fa930bb6 |
| 04-Feb-2019 |
Biju Das <biju.das@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <ge
arm64: dts: renesas: r8a774c0: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
| #
231d8908 |
| 31-Jan-2019 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices
This patch defines OOP tables for all CPUs, similarly to
what done by Takeshi Kihara and Yoshihiro Kaneko for the
R8A77990.
Signed-off-
arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices
This patch defines OOP tables for all CPUs, similarly to
what done by Takeshi Kihara and Yoshihiro Kaneko for the
R8A77990.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
show more ...
|
|
Revision tags: v4.19.15 |
|
| #
d9fd4e58 |
| 10-Jan-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2
SCIF2 on RZ/G2E can be used with both DMAC1 and DMAC2.
Fixes: 1b24f9e8ea3ff95f ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed
arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2
SCIF2 on RZ/G2E can be used with both DMAC1 and DMAC2.
Fixes: 1b24f9e8ea3ff95f ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Revision tags: v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10 |
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e961ab42 |
| 14-Dec-2018 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes
Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0)
SoC specific device tree.
Signed-off-by: Fabrizio Castro <fabrizi
arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes
Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0)
SoC specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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f0c2aa16 |
| 14-Dec-2018 |
Fabrizio Castro <fabrizio.castro@bp.renesas.com> |
arm64: dts: renesas: r8a774c0: Add PCIe device node
This patch adds PCI express channel 0 device tree node to the
RZ/G2E (a.k.a. R8A774C0) SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@
arm64: dts: renesas: r8a774c0: Add PCIe device node
This patch adds PCI express channel 0 device tree node to the
RZ/G2E (a.k.a. R8A774C0) SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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