| #
abf9c25d |
| 29-Jan-2016 |
Kefeng Wang <wangkefeng.wang@huawei.com> |
arm64: dts: hip05: Append all gicv3 ITS entries
There are four subsystems in hip05 soc, peri/m3/pcie/dsa,
each subsystem has one its, append them under gicv3 node.
They will be
arm64: dts: hip05: Append all gicv3 ITS entries
There are four subsystems in hip05 soc, peri/m3/pcie/dsa,
each subsystem has one its, append them under gicv3 node.
They will be used by hisilicon mbigen.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
show more ...
|
| #
6897db62 |
| 29-Jan-2016 |
Kefeng Wang <wangkefeng.wang@huawei.com> |
arm64: dts: hip05: Use Cortex specific device node for pmu
Instead of using the generic armv8-pmuv3 compatibility, use
the more specific Cortex A57 compatibility.
Signed-off-by:
arm64: dts: hip05: Use Cortex specific device node for pmu
Instead of using the generic armv8-pmuv3 compatibility, use
the more specific Cortex A57 compatibility.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
show more ...
|
| #
dbb58d0f |
| 29-Jan-2016 |
Kefeng Wang <wangkefeng.wang@huawei.com> |
arm64: dts: hip05: Add L2 cache topology
The Hip05 SoC has four L2 cache for all 16 CPUs, every four cpus
share one L2 cache, add them to the dtsi file so that the cache
hierarchy ca
arm64: dts: hip05: Add L2 cache topology
The Hip05 SoC has four L2 cache for all 16 CPUs, every four cpus
share one L2 cache, add them to the dtsi file so that the cache
hierarchy can be probed.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
show more ...
|
|
Revision tags: openbmc-20160127-1, openbmc-20160120-1 |
|
| #
b70ce2ab |
| 13-Jan-2016 |
yankejian <yankejian@huawei.com> |
dts: hisi: fixes no syscon fault when init mdio
When linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
mdio_bus mdio@803c0000: mdio
dts: hisi: fixes no syscon fault when init mdio
When linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
mdio_bus mdio@803c0000: mdio sys ctl reg has not maped"
The source code about the subctrl is dealt syscon, but dts doesn't.
It cause such fault, so this patch adds the syscon info on dts files to
fixes it.
Signed-off-by: Kejian Yan <yankejian@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
show more ...
|
|
Revision tags: v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1 |
|
| #
fcab303c |
| 06-Sep-2015 |
Ding Tianhong <dingtianhong@huawei.com> |
arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board
Add initial dtsi file to support Hisilicon Hip05-D02 Board with
support of CPUs in four clusters and each cluster has
arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board
Add initial dtsi file to support Hisilicon Hip05-D02 Board with
support of CPUs in four clusters and each cluster has quard Cortex-A57.
Also add dts file to support Hip05-D02 development board.
Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
show more ...
|