arm64: dts: imx: add i.MX8QXP thermal support

Add i.MX8QXP CPU thermal zone support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8qxp: Remove unnecessary "interrupt-parent" property

gic is appointed as default interrupt parent for devices, so no need
to specify it again in device nodes which use it as interrupt

arm64: dts: imx8qxp: Remove unnecessary "interrupt-parent" property

gic is appointed as default interrupt parent for devices, so no need
to specify it again in device nodes which use it as interrupt parent.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT

usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT accordin

arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT

usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Add scu key node

Add scu key node for i.MX8QXP, disabled by default as it
depends on board design.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <sh

arm64: dts: imx8qxp: Add scu key node

Add scu key node for i.MX8QXP, disabled by default as it
depends on board design.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Add DSP DT node

This includes DSP reserved memory, ADMA DSP device and DSP MU
communication channels description.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-of

arm64: dts: imx8qxp: Add DSP DT node

This includes DSP reserved memory, ADMA DSP device and DSP MU
communication channels description.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: add serial alias

Add i.MX8QXP serial alias for lpuart ports.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8qxp: add lpuart baud clock

Add imx8qxp lpuart baud clock.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8qxp: added ddr performance monitor nodes

Add ddr performance monitor

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn

arm64: dts: imx8qxp: added ddr performance monitor nodes

Add ddr performance monitor

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: sort LSIO subsystem devices

We prefer to sort device nodes under simple bus in order of unit
address. Let's sort the devices under lsio_subsys properly.

Signed-off-by: Shawn G

arm64: dts: imx8qxp: sort LSIO subsystem devices

We prefer to sort device nodes under simple bus in order of unit
address. Let's sort the devices under lsio_subsys properly.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: sort alias alphabetically

We prefer to sort alias entries alphabetically, so let's move serial0
to the right place.

Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8qxp: Add lsio_mu13 node

lsio_mu13 node is used to communicate with DSP.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx: add i.MX8QXP ocotp support

Add i.MX8QXP ocotp node

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer

arm64: dts: imx: add i.MX8QXP ocotp support

Add i.MX8QXP ocotp node

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: Daniel Baluta <daniel.baluta@nxp.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Move watchdog node into scu node

i.MX system controller watchdog has pretimeout function which
depends on i.MX SCU driver, so it should be a subnode of SCU.

Signed-off-by: Anso

arm64: dts: imx8qxp: Move watchdog node into scu node

i.MX system controller watchdog has pretimeout function which
depends on i.MX SCU driver, so it should be a subnode of SCU.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Add gpio alias

Add i.MX8QXP GPIO alias for kernel GPIO driver usage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8qxp: enable scu general irq channel

On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify
user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox
RX doorbell mode

arm64: dts: imx8qxp: enable scu general irq channel

On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify
user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox
RX doorbell mode is used for this function, this patch adds
support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Add lpuart1/lpuart2/lpuart3 nodes

lpuart nodes are part of the ADMA subsystem. See Audio DMA
memory map in iMX8 QXP RM [1]

This patch is based on the dtsi file initially submit

arm64: dts: imx8qxp: Add lpuart1/lpuart2/lpuart3 nodes

lpuart nodes are part of the ADMA subsystem. See Audio DMA
memory map in iMX8 QXP RM [1]

This patch is based on the dtsi file initially submitted by
Teo Hall in i.MX NXP internal tree.

[1] https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf

Signed-off-by: Teo Hall <teo.hall@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: add system controller watchdog support

Add i.MX8QXP system controller watchdog support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kern

arm64: dts: imx8qxp: add system controller watchdog support

Add i.MX8QXP system controller watchdog support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: add lsio_mu2 node

Add lsio_mu2 node which could be used communicate with SCU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed

arm64: dts: imx8qxp: add lsio_mu2 node

Add lsio_mu2 node which could be used communicate with SCU.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: fix mbox-cells

Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but
actually mu0-4 could be used to communicate with SCU. So fix the
mbox-cells.

Signed-off-by:

arm64: dts: imx8qxp: fix mbox-cells

Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but
actually mu0-4 could be used to communicate with SCU. So fix the
mbox-cells.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: add cpu opp table

Add i.MX8QXP CPU opp table to support cpufreq.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by

arm64: dts: imx8qxp: add cpu opp table

Add i.MX8QXP CPU opp table to support cpufreq.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8qxp: Fix MU4_INT number

MU4_INT correct number is 180, while 179 is for MU3_INT.

Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support")
Reviewed-by: Fabio Estevam <festevam@gm

arm64: dts: imx8qxp: Fix MU4_INT number

MU4_INT correct number is 180, while 179 is for MU3_INT.

Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx: add i.MX8QXP system controller RTC support

Add i.MX8QXP system controller RTC support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.or

arm64: dts: imx: add i.MX8QXP system controller RTC support

Add i.MX8QXP system controller RTC support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx: add imx8qxp support

i.MX 8QuadXPlus is a quad (4x) Cortex-A35 proccessor with powerful
graphic and multimedia features. This patch adds the core SoC dtsi
file support.

Cc: Mark Rut

arm64: dts: imx: add imx8qxp support

i.MX 8QuadXPlus is a quad (4x) Cortex-A35 proccessor with powerful
graphic and multimedia features. This patch adds the core SoC dtsi
file support.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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