ca33f735 | 16-May-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
arm64: dts: bitmain: Modify pin controller memory map
Earlier, the PWM registers were included as part of the pinctrl memory map, but this turned to be useless as the muxing is being handled by the
arm64: dts: bitmain: Modify pin controller memory map
Earlier, the PWM registers were included as part of the pinctrl memory map, but this turned to be useless as the muxing is being handled by the SoC pin controller itself. Hence, this commit removes the pwm register mapping from the pinctrl node to make it more clean.
Fixes: af2ff87de413 ("arm64: dts: bitmain: Add pinctrl support for BM1880 SoC") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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470fa429 | 24-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
Add pinctrl support for UARTs exposed on the Sophon Edge board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
Add pinctrl support for UARTs exposed on the Sophon Edge board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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c1294fb5 | 24-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports pinmuxing and the pinctrl registers are part of the sctrl block.
Signed-of
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. This SoC only supports pinmuxing and the pinctrl registers are part of the sctrl block.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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9fe40841 | 26-Feb-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
Add GPIO line names for Sophon Edge board based on BM1880 SoC from Bitmain. Line names are based on the board schematics as well as the
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
Add GPIO line names for Sophon Edge board based on BM1880 SoC from Bitmain. Line names are based on the board schematics as well as the 96Boards Consumer Edition specification v1.0.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
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3bba4e2f | 25-Jan-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
arm64: dts: bitmain: Add Sophon Egde board support
Add devicetree support for Sophon Edge board from Bitmain based on BM1880 SoC. This board is one of the 96Boards Consumer and AI platform. More inf
arm64: dts: bitmain: Add Sophon Egde board support
Add devicetree support for Sophon Edge board from Bitmain based on BM1880 SoC. This board is one of the 96Boards Consumer and AI platform. More information about this board can be found in 96Boards product page:
https://www.96boards.org/documentation/consumer/sophon-edge/
Only UART peripheral support is enabled for now.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
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