Revision tags: v5.4.28, v5.4.27, v5.4.26 |
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4d2cb376 |
| 13-Mar-2020 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order to enable the eMMC and the SPI NOR interface, we
arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order to enable the eMMC and the SPI NOR interface, we need to omit the 4 last pins from the eMMC pinctrl. As it was done for the Khadas VIM2, split the eMMC pinctrls in ctrl, data and ds pins with either 4bits data or 8bits data, and update the current board accordingly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-2-narmstrong@baylibre.com
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Revision tags: v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13 |
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5bea1336 |
| 17-Jan-2020 |
Guillaume La Roque <glaroque@baylibre.com> |
arm64: dts: meson-sm1-sei610: add missing interrupt-names add missing "host-wakeup interrupt names Fixes: 30388cc07572 ("arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt")
arm64: dts: meson-sm1-sei610: add missing interrupt-names add missing "host-wakeup interrupt names Fixes: 30388cc07572 ("arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt") Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200117133423.22602-1-glaroque@baylibre.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3 |
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30388cc0 |
| 05-Dec-2019 |
Guillaume La Roque <glaroque@baylibre.com> |
arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt add gpio irq to support interrupt trigger mode. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-b
arm64: dts: meson-sm1-sei610: add gpio bluetooth interrupt add gpio irq to support interrupt trigger mode. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12 |
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f424da7f |
| 13-Nov-2019 |
Kevin Hilman <khilman@baylibre.com> |
arm64: dts: meson-sm1-sei610: gpio-keys: switch to IRQs Switch the GPIO buttons/switches to use interrupts instead of polling. While at it, add the mic mute switch and the power button.
arm64: dts: meson-sm1-sei610: gpio-keys: switch to IRQs Switch the GPIO buttons/switches to use interrupts instead of polling. While at it, add the mic mute switch and the power button. Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6 |
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af92a9e0 |
| 09-Oct-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: sei610: enable audio Add and enable the audio devices on the sei610. The new FRDDR/TODDR D of the SM1 have been left out on purpose. The plaftorm has 2 possib
arm64: dts: meson: sei610: enable audio Add and enable the audio devices on the sei610. The new FRDDR/TODDR D of the SM1 have been left out on purpose. The plaftorm has 2 possible playback interfaces and 3 possible capture interfaces. 3 pcm interfaces for each direction is enough. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12 |
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2e09574d |
| 29-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: add keep-power-in-suspend property in SDIO node The WiFi firmware requires that the power is kept enabled while in suspend mode. Add the keep-power-in-suspe
arm64: dts: meson-sm1-sei610: add keep-power-in-suspend property in SDIO node The WiFi firmware requires that the power is kept enabled while in suspend mode. Add the keep-power-in-suspend property in the SDIO node to specify that the power must be kept when entering in a system wide suspend state. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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b09d116b |
| 29-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: add stdout-path property back The commit d4609acce187 ("arm64: dts: meson-sm1-sei610: enable DVFS") incorrectly removed the chosen node and the stdout-path
arm64: dts: meson-sm1-sei610: add stdout-path property back The commit d4609acce187 ("arm64: dts: meson-sm1-sei610: enable DVFS") incorrectly removed the chosen node and the stdout-path property. Add these back. Fixes: d4609acce187 ("arm64: dts: meson-sm1-sei610: enable DVFS") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.11 |
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488b0ffc |
| 26-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: enable DVFS This enables DVFS for the Amlogic SM1 based SEI610 board by: - Adding the SM1 SoC OPPs taken from the vendor tree - Selecting the SM1 Clock
arm64: dts: meson-sm1-sei610: enable DVFS This enables DVFS for the Amlogic SM1 based SEI610 board by: - Adding the SM1 SoC OPPs taken from the vendor tree - Selecting the SM1 Clock controller instead of the G12A one - Adding the CPU rail regulator, PWM and OPPs for each CPU nodes. Each power supply can achieve 0.69V to 1.05V using a single PWM output clocked at 666KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations of the cpu cluster and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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3d9e7648 |
| 26-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: enable DVFS This enables DVFS for the Amlogic SM1 based SEI610 board by: - Adding the SM1 SoC OPPs taken from the vendor tree - Selecting the SM1 Clock
arm64: dts: meson-sm1-sei610: enable DVFS This enables DVFS for the Amlogic SM1 based SEI610 board by: - Adding the SM1 SoC OPPs taken from the vendor tree - Selecting the SM1 Clock controller instead of the G12A one - Adding the CPU rail regulator, PWM and OPPs for each CPU nodes. Each power supply can achieve 0.69V to 1.05V using a single PWM output clocked at 666KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations of the cpu cluster and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.10 |
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24fe3e98 |
| 23-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: add USB support Add the USB properties for the Amlogic SM1 Based SEI610 Board in order to support the USB DRD Type-C port and the USB3 Type A port.
arm64: dts: meson-sm1-sei610: add USB support Add the USB properties for the Amlogic SM1 Based SEI610 Board in order to support the USB DRD Type-C port and the USB3 Type A port. The USB DRD Type-C controller uses the ID signal to toggle the USB role between the DWC3 Host controller and the DWC2 Device controller. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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96a386b6 |
| 23-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-sm1-sei610: add HDMI display support Add the HDMI support nodes for the Amlogic SM1 Based SEI610 Board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
arm64: dts: meson-sm1-sei610: add HDMI display support Add the HDMI support nodes for the Amlogic SM1 Based SEI610 Board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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e9a12e14 |
| 20-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: add support for SM1 based SEI Robotics SEI610 Add support for the Amlogic SM1 Based SEI610 board. The SM1 SoC is a derivative of the G12A SoC Family with : - Cortex-
arm64: dts: add support for SM1 based SEI Robotics SEI610 Add support for the Amlogic SM1 Based SEI610 board. The SM1 SoC is a derivative of the G12A SoC Family with : - Cortex-A55 core instead of A53 - more power domains, including USB & PCIe - a neural network co-processor (NNA) - a CSI input and image processor - some changes in the audio complex, thus not yet enabled The SEI610 board is a derivative of the SEI510 board with : - removed ADC based touch button, replaced with 3x GPIO buttons - physical switch disabling on-board MICs - USB-C port for USB 2.0 OTG - On-board FTDI USB2SERIAL port for Linux console Audio, Display and USB support will be added later when support of the corresponding power domains will be added, for now they are kept disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [khilman: fix minor typo regultor -> regulator] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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