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Revision tags: v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3 |
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1e33e0db |
| 20-Nov-2018 |
Chen-Yu Tsai <wens@csie.org> |
arm64: dts: allwinner: h6: orangepi: Add device nodes for LEDs
The Orange Pi Lite 2 and Orange Pi One Plus both have two LEDs, one red
and one green. These are driven directly by GPIO li
arm64: dts: allwinner: h6: orangepi: Add device nodes for LEDs
The Orange Pi Lite 2 and Orange Pi One Plus both have two LEDs, one red
and one green. These are driven directly by GPIO lines in an active high
arrangement. The red LED is labeled "power", so it is set to be on by
default.
Note that the default drive current for the GPIO lines makes the LEDs
very bright.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
show more ...
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9b8d1ccd |
| 20-Nov-2018 |
Chen-Yu Tsai <wens@csie.org> |
arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and OTG ports
The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to
arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and OTG ports
The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
which is also directly tied to the DC jack. There is no current limiting
in this design.
This patch enables all the USB 2.0 related device nodes, and sets the
VBUS regulator supplies and OTG ID detection GPIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
show more ...
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| #
919d2514 |
| 20-Nov-2018 |
Chen-Yu Tsai <wens@csie.org> |
arm64: dts: allwinner: h6: orangepi: Add board-wide 5V regulator
The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to the b
arm64: dts: allwinner: h6: orangepi: Add board-wide 5V regulator
The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
which is also directly tied to the DC jack. There is no current limiting
in this design. This 5V rail also supplies the various inputs to the
PMIC.
This patch adds a board wide 5V regulator and sets it as the input to
the PMIC inputs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
show more ...
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Revision tags: v4.18.19, v4.19.2, v4.18.18 |
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| #
f0c083b8 |
| 05-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: h6: Add common orangepi nodes into dtsi
Based on the information from hardware schematics and orangepi
vendor orangepi H6 boards, One Plus and Lite2 shares common nodes
arm64: allwinner: h6: Add common orangepi nodes into dtsi
Based on the information from hardware schematics and orangepi
vendor orangepi H6 boards, One Plus and Lite2 shares common nodes
like axp805, uart, mmc0 etc. The common differences between them is
- One Plus, has Ethernet
- Lite2, has Wifi, USB3, CSI port.
So, add common orangepi nodes into sun50i-h6-orangepi.dtsi so-that
it case use on respective orangepi h6 board dts files.
Cc: zhaoyifan <zhao_steven@263.net>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
show more ...
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