#
5ba155a4 |
| 01-Aug-2018 |
Keiji Hayashibara <hayashibara.keiji@socionext.com> |
spi: add SPI controller driver for UniPhier SoC
Add SPI controller driver implemented in Socionext UniPhier SoCs.
UniPhier SoCs have two types SPI controllers; SCSSI supports a single channel, and
spi: add SPI controller driver for UniPhier SoC
Add SPI controller driver implemented in Socionext UniPhier SoCs.
UniPhier SoCs have two types SPI controllers; SCSSI supports a single channel, and MCSSI supports multiple channels. This driver supports SCSSI only.
This controller has 32bit TX/RX FIFO with depth of eight entry, and supports the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17 |
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#
c36ff266 |
| 26-Apr-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the cu
spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general.
This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@exceet.de> Tested-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
055ed0da |
| 10-May-2018 |
Rafał Miłecki <rafal@milecki.pl> |
spi: remove forgotten CONFIG_SPI_BCM53XX
I accidentally sent an early version of patch removing spi-bcm53xx driver which got rid of .c and .h files *only*. I amended local commit but forgot to re-fo
spi: remove forgotten CONFIG_SPI_BCM53XX
I accidentally sent an early version of patch removing spi-bcm53xx driver which got rid of .c and .h files *only*. I amended local commit but forgot to re-format the patch.
This commit removes leftovers of dropped driver.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.16 |
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#
47838669 |
| 09-Mar-2018 |
Arnd Bergmann <arnd@arndb.de> |
spi: remove blackfin related host drivers
The blackfin architecture is getting removed, so these won't be needed any more.
Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Aaron Wu <aaron.wu@ana
spi: remove blackfin related host drivers
The blackfin architecture is getting removed, so these won't be needed any more.
Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Aaron Wu <aaron.wu@analog.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v4.15, v4.13.16, v4.14 |
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#
b2441318 |
| 01-Nov-2017 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license identifiers to apply.
- when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary:
SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became the concluded license(s).
- when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time.
In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related.
Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v4.13.5 |
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#
7e2903cb |
| 15-Sep-2017 |
Baolin Wang <baolin.wang@spreadtrum.com> |
spi: Add ADI driver for Spreadtrum platform
This patch adds ADI driver based on SPI framework for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by:
spi: Add ADI driver for Spreadtrum platform
This patch adds ADI driver based on SPI framework for Spreadtrum SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.13, v4.12 |
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#
dcbe0d84 |
| 21-Jun-2017 |
Amelie Delaunay <amelie.delaunay@st.com> |
spi: add driver for STM32 SPI controller
The STM32 Serial Peripheral Interface (SPI) can be used to communicate with external devices while using the specific synchronous protocol. It supports a hal
spi: add driver for STM32 SPI controller
The STM32 Serial Peripheral Interface (SPI) can be used to communicate with external devices while using the specific synchronous protocol. It supports a half-duplex, full-duplex and simplex synchronous, serial communication with external devices with 4-bit to 16/32-bit per word. It has two 8x/16x 8-bit embedded Rx and TxFIFOs with DMA capability. It can operate in master or slave mode.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
ce70e06c |
| 22-May-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
spi: slave: Add SPI slave handler controlling system state
Add an example SPI slave handler to allow remote control of system reboot, power off, halt, and suspend.
Signed-off-by: Geert Uytterhoeven
spi: slave: Add SPI slave handler controlling system state
Add an example SPI slave handler to allow remote control of system reboot, power off, halt, and suspend.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
29f9ffa0 |
| 22-May-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
spi: slave: Add SPI slave handler reporting uptime at previous message
Add an example SPI slave handler responding with the uptime at the time of reception of the last SPI message.
This can be used
spi: slave: Add SPI slave handler reporting uptime at previous message
Add an example SPI slave handler responding with the uptime at the time of reception of the last SPI message.
This can be used by an external microcontroller as a dead man's switch.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
6c364062 |
| 22-May-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
spi: core: Add support for registering SPI slave controllers
Add support for registering SPI slave controllers using the existing SPI master framework: - SPI slave controllers must use spi_alloc_s
spi: core: Add support for registering SPI slave controllers
Add support for registering SPI slave controllers using the existing SPI master framework: - SPI slave controllers must use spi_alloc_slave() instead of spi_alloc_master(), and should provide an additional callback "slave_abort" to abort an ongoing SPI transfer request, - SPI slave controllers are added to a new "spi_slave" device class, - SPI slave handlers can be bound to the SPI slave device represented by an SPI slave controller using a DT child node named "slave", - Alternatively, (un)binding an SPI slave handler to the SPI slave device represented by an SPI slave controller can be done by (un)registering the slave device through a sysfs virtual file named "slave".
From the point of view of an SPI slave protocol handler, an SPI slave controller looks almost like an ordinary SPI master controller. The only exception is that a transfer request will block on the remote SPI master, and may be cancelled using spi_slave_abort().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
454fa271 |
| 23-May-2017 |
Neil Armstrong <narmstrong@baylibre.com> |
spi: Add Meson SPICC driver
The SPICC hardware block on the Amlogic SoCs is Communication oriented and can do Full-Duplex 8- to 32-bit width SPI transfers up to 30MHz.
The current driver only suppo
spi: Add Meson SPICC driver
The SPICC hardware block on the Amlogic SoCs is Communication oriented and can do Full-Duplex 8- to 32-bit width SPI transfers up to 30MHz.
The current driver only supportd the PIO transfer mode since the DMA seems broken on available hardware.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10 |
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#
17f84b79 |
| 13-Feb-2017 |
Hauke Mehrtens <hauke@hauke-m.de> |
spi: lantiq-ssc: add support for Lantiq SSC SPI controller
This driver supports the Lantiq SSC SPI controller in master mode. This controller is found on Intel (former Lantiq) SoCs like the Danube,
spi: lantiq-ssc: add support for Lantiq SSC SPI controller
This driver supports the Lantiq SSC SPI controller in master mode. This controller is found on Intel (former Lantiq) SoCs like the Danube, Falcon, xRX200, xRX300.
The hardware uses two hardware FIFOs one for received and one for transferred bytes. When the driver writes data into the transmit FIFO the complete word is taken from the FIFO into a shift register. The data from this shift register is then written to the wire. This driver uses the interrupts signaling the status of the FIFOs and not the shift register. It is also possible to use the interrupts for the shift register, but they will send a signal after every word. When using the interrupts for the shift register we get a signal when the last word is written into the shift register and not when it is written to the wire. After all FIFOs are empty the driver busy waits till the hardware is not busy any more and returns the transfer status.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.9 |
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#
5762ab71 |
| 08-Dec-2016 |
Romain Perier <romain.perier@free-electrons.com> |
spi: Add support for Armada 3700 SPI Controller
Marvell Armada 3700 SoC comprises an SPI Controller. This Controller supports up to 4 SPI slave devices, with dedicated chip selects,supports SPI mode
spi: Add support for Armada 3700 SPI Controller
Marvell Armada 3700 SoC comprises an SPI Controller. This Controller supports up to 4 SPI slave devices, with dedicated chip selects,supports SPI mode 0/1/2 and 3, CPIO or Fifo mode with DMA transfers and different SPI transfer mode (Single, Dual or Quad).
This commit adds basic driver support for FIFO mode. In this mode, dedicated registers are used to store the instruction, the address, the read mode and the data. Write and Read FIFO are used to store the outcoming or incoming data. The data FIFOs are accessible via DMA or by the CPU. Only the CPU is supported for now.
Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
5314987d |
| 22-Nov-2016 |
Gao Pan <pandy.gao@nxp.com> |
spi: imx: add lpspi bus driver
This patch adds lpspi driver to support new i.MX products which use lpspi instead of ecspi.
The lpspi can continue operating in stop mode when an appropriate clock is
spi: imx: add lpspi bus driver
This patch adds lpspi driver to support new i.MX products which use lpspi instead of ecspi.
The lpspi can continue operating in stop mode when an appropriate clock is available. It is also designed for low CPU overhead with DMA offloading of FIFO register accesses.
Signed-off-by: Gao Pan <pandy.gao@nxp.com> Reviewed-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20 |
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#
cc20a386 |
| 24-Aug-2016 |
Kamal Dasu <kdasu.kdev@gmail.com> |
spi: iproc-qspi: Add Broadcom iProc SoCs support
This spi driver uses the common spi-bcm-qspi driver and implements iProc SoCs specific interrupt controller. The common driver now calls the SoC hand
spi: iproc-qspi: Add Broadcom iProc SoCs support
This spi driver uses the common spi-bcm-qspi driver and implements iProc SoCs specific interrupt controller. The common driver now calls the SoC handlers when present. Adding support for both muxed l1 and unmuxed interrupt sources.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
44f95d87 |
| 24-Aug-2016 |
Kamal Dasu <kdasu.kdev@gmail.com> |
spi: brcmstb-qspi: Broadcom settop platform driver
Adding the settop SoC platfrom driver, this driver is compatible with the settop MSPI+BSPI and MSPI only blocks implemented on the SoCs. Driver cal
spi: brcmstb-qspi: Broadcom settop platform driver
Adding the settop SoC platfrom driver, this driver is compatible with the settop MSPI+BSPI and MSPI only blocks implemented on the SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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#
fa236a7e |
| 24-Aug-2016 |
Kamal Dasu <kdasu.kdev@gmail.com> |
spi: bcm-qspi: Add Broadcom MSPI driver
Master SPI driver for Broadcom settop, iProc SoCs. The driver is used for devices that use SPI protocol on BRCMSTB, NSP, NS2 SoCs. SoC platform driver call ex
spi: bcm-qspi: Add Broadcom MSPI driver
Master SPI driver for Broadcom settop, iProc SoCs. The driver is used for devices that use SPI protocol on BRCMSTB, NSP, NS2 SoCs. SoC platform driver call exported porbe(), remove() and suspend/resume pm_ops implemented in this common driver.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.7.2, v4.4.19 |
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#
7347a6c7 |
| 19-Aug-2016 |
Jan Glauber <jglauber@cavium.com> |
spi: octeon: Add ThunderX driver
Add ThunderX SPI driver using the shared part from the Octeon driver. The main difference of the ThunderX driver is that it is a PCI device so probing is different.
spi: octeon: Add ThunderX driver
Add ThunderX SPI driver using the shared part from the Octeon driver. The main difference of the ThunderX driver is that it is a PCI device so probing is different. The system clock settings can be specified in device tree.
Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17 |
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#
2cb1b3b3 |
| 03-Aug-2016 |
Rich Felker <dalias@libc.org> |
spi: add driver for J-Core SPI controller
The J-Core "spi2" device is a PIO-based SPI master controller. It differs from "bitbang" devices in that that it's clocked in hardware rather than via soft
spi: add driver for J-Core SPI controller
The J-Core "spi2" device is a PIO-based SPI master controller. It differs from "bitbang" devices in that that it's clocked in hardware rather than via soft clock modulation over gpio, and performs byte-at-a-time transfers between the cpu and SPI controller.
This driver will be extended to support future versions of the J-Core SPI controller with DMA transfers when they become available.
Signed-off-by: Rich Felker <dalias@libc.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-4.4-20160804-1, v4.4.16, v4.7 |
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#
63d49afe |
| 23-Jul-2016 |
Jan Glauber <jglauber@cavium.com> |
spi: octeon: Split driver into Octeon specific and common parts
Separate driver probing from SPI transfer functions.
Signed-off-by: Jan Glauber <jglauber@cavium.com> Tested-by: Steven J. Hill <stev
spi: octeon: Split driver into Octeon specific and common parts
Separate driver probing from SPI transfer functions.
Signed-off-by: Jan Glauber <jglauber@cavium.com> Tested-by: Steven J. Hill <steven.hill@cavium.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8 |
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#
3270ac23 |
| 15-Apr-2016 |
Purna Chandra Mandal <purna.mandal@microchip.com> |
spi: pic32-sqi: add SPI driver for PIC32 SQI controller.
This driver implements SPI master interface for Quad SPI controller, specifically for accessing quad SPI flash. It uses descriptor-based DMA
spi: pic32-sqi: add SPI driver for PIC32 SQI controller.
This driver implements SPI master interface for Quad SPI controller, specifically for accessing quad SPI flash. It uses descriptor-based DMA transfer mode and supports half-duplex communication for single, dual and quad SPI transactions.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: v4.4.7 |
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#
1bcb9f8c |
| 01-Apr-2016 |
Purna Chandra Mandal <purna.mandal@microchip.com> |
spi: spi-pic32: Add PIC32 SPI master driver
The PIC32 SPI driver is capable of performing SPI transfers using PIO or external DMA engine. GPIO controlled /CS support is made default in the driver fo
spi: spi-pic32: Add PIC32 SPI master driver
The PIC32 SPI driver is capable of performing SPI transfers using PIO or external DMA engine. GPIO controlled /CS support is made default in the driver for correct operation of the controller. This can be enabled by adding "cs-gpios" property of the SPI node in board dts file.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3 |
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#
7ecbfff6 |
| 23-Feb-2016 |
Sergei Ianovich <ynvich@gmail.com> |
spi: master driver to enable RTC on ICPDAS LP-8841
ICP DAS LP-8841 contains a DS-1302 RTC. This driver provides an SPI master which makes the RTC usable. The driver is not supposed to work with anyt
spi: master driver to enable RTC on ICPDAS LP-8841
ICP DAS LP-8841 contains a DS-1302 RTC. This driver provides an SPI master which makes the RTC usable. The driver is not supposed to work with anything else.
The driver uses the standard MicroWire half-duplex transfer timing. Master output is set on low clock and sensed by the RTC on the rising edge. Master input is set by the RTC on the trailing edge and is sensed by the master on low clock.
Signed-off-by: Sergei Ianovich <ynvich@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1 |
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#
b1353d1c |
| 04-Feb-2016 |
Lars-Peter Clausen <lars@metafoo.de> |
spi: Add Analog Devices AXI SPI Engine controller support
This patch adds support for the AXI SPI Engine controller which is a FPGA soft-peripheral which is used in some of Analog Devices' reference
spi: Add Analog Devices AXI SPI Engine controller support
This patch adds support for the AXI SPI Engine controller which is a FPGA soft-peripheral which is used in some of Analog Devices' reference designs.
The AXI SPI Engine controller is part of the SPI Engine framework[1] and allows memory mapped access to the SPI Engine control bus. This allows it to be used as a general purpose software driven SPI controller. The SPI Engine in addition offers some optional advanced acceleration and offloading capabilities, which are not part of this patch though and will be introduced separately.
At the core of the SPI Engine framework is a small sort of co-processor that accepts a command stream and turns the commands into low-level SPI transactions. Communication is done through three memory mapped FIFOs in the register map of the AXI SPI Engine peripheral. One FIFO for the command stream and one each for transmit and receive data.
The driver translates a spi_message in a command stream and writes it to the peripheral which executes it asynchronously. This allows it to perform very precise timings which are required for some SPI slave devices to achieve maximum performance (e.g. analog-to-digital and digital-to-analog converters). The execution flow is synchronized to the host system by a special synchronize instruction which generates a interrupt.
[1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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Revision tags: openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1 |
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22a33632 |
| 13-Jan-2016 |
Jarkko Nikula <jarkko.nikula@linux.intel.com> |
spi: pxa2xx: Remove CONFIG_SPI_PXA2XX_DMA
After removal of legacy PXA DMA code by the commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits") the CONFIG_SPI_PXA2XX_DMA follows the CONFIG
spi: pxa2xx: Remove CONFIG_SPI_PXA2XX_DMA
After removal of legacy PXA DMA code by the commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits") the CONFIG_SPI_PXA2XX_DMA follows the CONFIG_SPI_PXA2XX and cannot be disabled alone. Therefore remove this config symbol and dead definitions from the spi-pxa2xx.h.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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