| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
6dd03462 |
| 21-Oct-2021 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
soc: aspeed: Fix UART routing driver
The build changes relating to the routing driver were lost when
backporting.
Signed-off-by: Joel Stanley <joel@jms.id.au>
|
| #
e4fc8958 |
| 05-May-2020 |
Eddie James <eajames@linux.ibm.com> |
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This com
soc: aspeed: Add XDMA Engine Driver
The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
DMA operations between the SOC (acting as a BMC) and a host processor
in a server.
This commit adds a driver to control the XDMA engine and adds functions
to initialize the hardware and memory and start DMA operations.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/1588697905-23444-3-git-send-email-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|
| #
b51bc8b0 |
| 03-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kern
ARM: soc: aspeed: Add secure boot controller support
This reads out the status of the secure boot controller and exposes it
in debugfs.
An example on a AST2600A3 QEMU model:
# grep -r . /sys/kernel/debug/aspeed/*
/sys/kernel/debug/aspeed/abr_image:0
/sys/kernel/debug/aspeed/low_security_key:0
/sys/kernel/debug/aspeed/otp_protected:0
/sys/kernel/debug/aspeed/secure_boot:1
/sys/kernel/debug/aspeed/uart_boot:0
On boot the state of the system according to the secure boot controller
will be printed:
[ 0.037634] AST2600 secure boot enabled
or
[ 0.037935] AST2600 secure boot disabled
OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220304030336.1017197-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
show more ...
|