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Revision tags: v3.7-rc5 |
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| #
e7ed6718 |
| 07-Nov-2012 |
Haojian Zhuang <haojian.zhuang@gmail.com> |
pinctrl: single: dump pinmux register value
Dump pinmux register value, not only function part in the pinmux
register.
Also fix the issue on caluclating pin offset. The last par
pinctrl: single: dump pinmux register value
Dump pinmux register value, not only function part in the pinmux
register.
Also fix the issue on caluclating pin offset. The last parameter
should be pin number, not register offset.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v3.7-rc4, v3.7-rc3, v3.7-rc2, v3.7-rc1, v3.6 |
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| #
7d66ce7f |
| 26-Sep-2012 |
Matt Porter <mporter@ti.com> |
pinctrl: pinctrl-single: add debugfs pin h/w state info
Adds support for displaying the individual pin h/w config state.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: To
pinctrl: pinctrl-single: add debugfs pin h/w state info
Adds support for displaying the individual pin h/w config state.
Signed-off-by: Matt Porter <mporter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v3.6-rc7, v3.6-rc6 |
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| #
9e605cb6 |
| 11-Sep-2012 |
Peter Ujfalusi <peter.ujfalusi@ti.com> |
pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
With pinctrl-single,bits it is possible to update just part of the register
within the pinctrl-single,function-mask area.
pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux
With pinctrl-single,bits it is possible to update just part of the register
within the pinctrl-single,function-mask area.
This is useful when one register configures mmore than one pin's mux.
pinctrl-single,bits takes three parameters:
<reg offset, value, sub-mask>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[Removed a misplaced comment]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v3.6-rc5 |
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| #
00ba7a50 |
| 05-Sep-2012 |
Peter Ujfalusi <peter.ujfalusi@ti.com> |
pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
Use the pcs->fmask to make sure that the value is not changing (setting)
bits in areas where it should not.
T
pinctrl: pinctrl-single: Make sure we do not change bits outside of mask
Use the pcs->fmask to make sure that the value is not changing (setting)
bits in areas where it should not.
To avoid situations like this:
pmx_dummy: pinmux@4a100040 {
compatible = "pinctrl-single";
reg = <0x4a100040 0x0196>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x00ff>;
};
&pmx_dummy {
pinctrl-names = "default";
pinctrl-0 = <&board_pins>;
board_pins: pinmux_board_pins {
pinctrl-single,pins = <
0x6c 0xf0f
0x6e 0x10f
0x70 0x23f
0x72 0xa5f
>;
};
};
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v3.6-rc4, v3.6-rc3, v3.6-rc2, v3.6-rc1, v3.5, v3.5-rc7 |
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| #
8b8b091b |
| 10-Jul-2012 |
Tony Lindgren <tony@atomide.com> |
pinctrl: Add one-register-per-pin type device tree based pinctrl driver
Add one-register-per-pin type device tree based pinctrl driver.
This driver has been tested on omap2+ series
pinctrl: Add one-register-per-pin type device tree based pinctrl driver
Add one-register-per-pin type device tree based pinctrl driver.
This driver has been tested on omap2+ series of processors,
where there is either an 8 or 16-bit padconf register for each pin.
Support for other similar pinmux controllers can be added.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
show more ...
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