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39e794bf |
| 15-Jan-2015 |
Yaniv Gardi <ygardi@codeaurora.org> |
phy: qcom-ufs: add support for 20nm phy This change adds a support for a 20nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: Yaniv Gardi
phy: qcom-ufs: add support for 20nm phy This change adds a support for a 20nm qcom-ufs phy that is required in platforms that use ufs-qcom controller. Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Dov Levenglick <dovl@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
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#
adaafaa3 |
| 15-Jan-2015 |
Yaniv Gardi <ygardi@codeaurora.org> |
phy: qcom-ufs: add support for QUALCOMM Technologies UFS PHY drivers This change adds a generic and common API support for ufs phy QUALCOMM Technologies. This support provides common cod
phy: qcom-ufs: add support for QUALCOMM Technologies UFS PHY drivers This change adds a generic and common API support for ufs phy QUALCOMM Technologies. This support provides common code and also points to specific phy callbacks to differentiate between different behaviors of frequent use-cases (like power on, power off, phy calibration etc). Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org> Reviewed-by: Dov Levenglick <dovl@codeaurora.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
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Revision tags: v3.18, v3.18-rc7, v3.18-rc6, v3.18-rc5 |
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#
eee47538 |
| 13-Nov-2014 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
phy: add support for USB cluster on the Armada 375 SoC The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to
phy: add support for USB cluster on the Armada 375 SoC The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds a driver integrated in the generic PHY framework to control this USB cluster feature. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> [ kishon@ti.com : Made it to use the updated devm_phy_create API and soem cosmentic changes in Kconfig file.] Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
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#
13ebb68c |
| 20-Nov-2014 |
Antoine Tenart <antoine.tenart@free-electrons.com> |
phy: add the Berlin USB PHY driver Add the driver driving the Marvell Berlin USB PHY. This allows to initialize the PHY and to use it from the USB driver later. Signed-off-by: A
phy: add the Berlin USB PHY driver Add the driver driving the Marvell Berlin USB PHY. This allows to initialize the PHY and to use it from the USB driver later. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v3.18-rc4 |
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#
2c14e9be |
| 04-Nov-2014 |
Gabriel FERNANDEZ <gabriel.fernandez@st.com> |
phy: miphy28lp: Provide support for the MiPHY28lp Generic PHY The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe or USB3 devices. Signed-off-by: alexandre torgu
phy: miphy28lp: Provide support for the MiPHY28lp Generic PHY The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe or USB3 devices. Signed-off-by: alexandre torgue <alexandre.torgue@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v3.18-rc3, v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6, v3.17-rc5 |
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#
3f8da2e3 |
| 08-Sep-2014 |
Peter Griffin <peter.griffin@linaro.org> |
phy: phy-stih41x-usb: Add usb phy support for STiH41x SoCs. This driver adds support for USB (1.1 and 2.0) phy for STiH415 and STiH416 System-On-Chips from STMicroelectronics. S
phy: phy-stih41x-usb: Add usb phy support for STiH41x SoCs. This driver adds support for USB (1.1 and 2.0) phy for STiH415 and STiH416 System-On-Chips from STMicroelectronics. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
89ae1f5d |
| 11-Sep-2014 |
Peter Griffin <peter.griffin@linaro.org> |
phy: phy-stih407-usb: Add usb picoPHY driver found on stih407 SoC family This is the generic phy driver for the picoPHY ports used by the USB2 and USB3 Host controllers when controlling
phy: phy-stih407-usb: Add usb picoPHY driver found on stih407 SoC family This is the generic phy driver for the picoPHY ports used by the USB2 and USB3 Host controllers when controlling usb2/1.1 devices. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v3.17-rc4, v3.17-rc3, v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7 |
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#
1233f59f |
| 22-Jul-2014 |
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
phy: Renesas R-Car Gen2 PHY driver This PHY, though formally being a part of Renesas USBHS controller, contains the UGCTRL2 register that controls multiplexing of the USB ports (Renesas
phy: Renesas R-Car Gen2 PHY driver This PHY, though formally being a part of Renesas USBHS controller, contains the UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them channels) to the different USB controllers: channel 0 can be connected to either PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI or xHCI controllers. This is a new driver for this USB PHY currently already supported under drivers/ usb/phy/. The reason for writing the new driver was the requirement that the multiplexing of USB channels to the controller be dynamic, depending on what USB drivers are loaded, rather than static as provided by the old driver. The infrastructure provided by drivers/phy/phy-core.c seems to fit that purpose ideally. The new driver only supports device tree probing for now. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
10c8e056 |
| 08-Aug-2014 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "A handful of driver-related changes. We've h
Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "A handful of driver-related changes. We've had a bunch of them going in through other branches as well, so it's only a part of what we really have this release. Larger pieces are: - Removal of a now unused PWM driver for atmel [ This includes AVR32 changes that have been appropriately acked ] - Performance counter support for the arm CCN interconnect - OMAP mailbox driver cleanups and consolidation - PCI and SATA PHY drivers for SPEAr 13xx platforms - Redefinition (with backwards compatibility!) of PCI DT bindings for Tegra to better model regulators/power" Note: this merge also fixes up the semantic conflict with the new calling convention for devm_phy_create(), see commit f0ed817638b5 ("phy: core: Let node ptr of PHY point to PHY and not of PHY provider") that came in through Greg's USB tree. Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through the next tree. * tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits) bus: arm-ccn: Fix error handling at event allocation mailbox/omap: add a parent structure for every IP instance mailbox/omap: remove the private mailbox structure mailbox/omap: consolidate OMAP mailbox driver mailbox/omap: simplify the fifo assignment by using macros mailbox/omap: remove omap_mbox_type_t from mailbox ops mailbox/omap: remove OMAP1 mailbox driver mailbox/omap: use devm_* interfaces bus: ARM CCN: add PERF_EVENTS dependency bus: ARM CCN PMU driver PCI: spear: Remove spear13xx_pcie_remove() PCI: spear: Fix Section mismatch compilation warning for probe() ARM: tegra: Remove legacy PCIe power supply properties PCI: tegra: Remove deprecated power supply properties PCI: tegra: Implement accurate power supply scheme ARM: SPEAr13xx: Update defconfigs ARM: SPEAr13xx: Add pcie and miphy DT nodes ARM: SPEAr13xx: Add bindings and dt node for misc block ARM: SPEAr13xx: Fix static mapping table phy: Add drivers for PCIe and SATA phy on SPEAr13xx ...
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#
b3345d7c |
| 08-Aug-2014 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and othe
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
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Revision tags: v3.16-rc6, v3.16-rc5 |
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#
6e877fed |
| 09-Jul-2014 |
Lee Jones <lee.jones@linaro.org> |
phy: miphy365x: Provide support for the MiPHY356x Generic PHY The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; bot
phy: miphy365x: Provide support for the MiPHY356x Generic PHY The MiPHY365x is a Generic PHY which can serve various SATA or PCIe devices. It has 2 ports which it can use for either; both SATA, both PCIe or one of each in any configuration. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
4f6160d4 |
| 16-Jul-2014 |
Kumar Gala <galak@codeaurora.org> |
phy: qcom: Add driver for QCOM IPQ806x SATA PHY Add a PHY driver for uses with AHCI based SATA controller driver on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala <galak@
phy: qcom: Add driver for QCOM IPQ806x SATA PHY Add a PHY driver for uses with AHCI based SATA controller driver on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
942a31b5 |
| 07-Jul-2014 |
Antoine Ténart <antoine.tenart@free-electrons.com> |
phy: add a driver for the Berlin SATA PHY The Berlin SoC has a two SATA ports. Add a PHY driver to handle them. The mode selection can let us think this PHY can be configured to fit
phy: add a driver for the Berlin SATA PHY The Berlin SoC has a two SATA ports. Add a PHY driver to handle them. The mode selection can let us think this PHY can be configured to fit other purposes. But there are reasons to think the SATA mode will be the only one usable: the PHY registers are only accessible indirectly through two registers in the SATA range, the PHY seems to be integrated and no information tells us the contrary. For these reasons, make the driver a SATA PHY driver. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
1de990d8 |
| 14-Jul-2014 |
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
phy: qcom: Add driver for QCOM APQ8064 SATA PHY Add a PHY driver for uses with AHCI based SATA controller driver on the APQ8064 family of SoCs. This patch is a forward port from
phy: qcom: Add driver for QCOM APQ8064 SATA PHY Add a PHY driver for uses with AHCI based SATA controller driver on the APQ8064 family of SoCs. This patch is a forward port from Qualcomm's v3.4 andriod kernel. Tested on IFC6410 board. CC: Sujit Reddy Thumma <sthumma@codeaurora.org> Tested-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v3.16-rc4 |
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#
e379413a |
| 03-Jul-2014 |
Jiancheng Xue <xuejiancheng@huawei.com> |
phy: add hix5hd2-sata-phy driver Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc. Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: Zhangfei Gao <zhangf
phy: add hix5hd2-sata-phy driver Add hix5hd2-sata-phy driver on Hisilicon hix5hd2 soc. Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Revision tags: v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15, v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8, v3.14-rc7, v3.14-rc6, v3.14-rc5, v3.14-rc4, v3.14-rc3, v3.14-rc2, v3.14-rc1, v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5 |
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#
949ccc3a |
| 20-Dec-2013 |
Mateusz Krawczuk <mat.krawczuk@gmail.com> |
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver. Signed-off-by: Mateusz Krawczuk <m.krawczuk
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> [k.debski@samsung.com: cleanup and commit description] [k.debski@samsung.com: make changes accordingly to the mailing list comments] Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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#
64562e99 |
| 14-Apr-2014 |
Pratyush Anand <pratyush.anand@st.com> |
phy: Add drivers for PCIe and SATA phy on SPEAr13xx ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as 'miphy') for PCIe and SATA. This patch adds drivers for
phy: Add drivers for PCIe and SATA phy on SPEAr13xx ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as 'miphy') for PCIe and SATA. This patch adds drivers for these miphys. This also adds proper bindings for miphys. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Tested-by: Mohit Kumar <mohit.kumar@st.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> [viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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#
59025887 |
| 13-May-2014 |
Vivek Gautam <gautam.vivek@samsung.com> |
phy: Add new Exynos5 USB 3.0 PHY driver Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs. The new driver uses the generic PHY framework and will interact with DWC3 cont
phy: Add new Exynos5 USB 3.0 PHY driver Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs. The new driver uses the generic PHY framework and will interact with DWC3 controller present on Exynos5 series of SoCs. Also, created a new header file in linux/mfd/syscon/ for Exynos5 SoCs and put the required PMU offset definitions for the basic available PHYs. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
d1481832 |
| 18-Apr-2014 |
Arnd Bergmann <arnd@arndb.de> |
phy: exynos: fix building as a module The top-level phy-samsung-usb2 driver may be configured as a loadable module, which currently causes link errors because of the dependency on th
phy: exynos: fix building as a module The top-level phy-samsung-usb2 driver may be configured as a loadable module, which currently causes link errors because of the dependency on the exynos{5250,4x12,4210}_usb2_phy_config symbol. Solving this could be achieved by exporting these symbols, but as the SoC-specific parts of the driver are not currently built as modules, it seems better to just link everything into one module and avoid the need for the export. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
88e670fe |
| 07-Mar-2014 |
Loc Ho <lho@apm.com> |
PHY: add APM X-Gene SoC 15Gbps Multi-purpose PHY driver This patch adds support for the APM X-Gene SoC 15Gbps Multi-purpose PHY. This is the physical layer interface for the correspondin
PHY: add APM X-Gene SoC 15Gbps Multi-purpose PHY driver This patch adds support for the APM X-Gene SoC 15Gbps Multi-purpose PHY. This is the physical layer interface for the corresponding host controller. Currently, only external clock and Gen3 SATA mode are supported. Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Tuan Phan <tphan@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
14da699b |
| 06-Mar-2014 |
Kishon Vijay Abraham I <kishon@ti.com> |
phy: rename struct omap_control_usb to struct omap_control_phy Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also m
phy: rename struct omap_control_usb to struct omap_control_phy Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com>
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#
64bf2b23 |
| 06-Mar-2014 |
Kamil Debski <k.debski@samsung.com> |
phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver Add support for Exynos 5250. This driver is to replace the old USB 2.0 PHY driver. Signed-off-by: Kamil Debski <k.d
phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver Add support for Exynos 5250. This driver is to replace the old USB 2.0 PHY driver. Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
06fb0137 |
| 06-Mar-2014 |
Kamil Debski <k.debski@samsung.com> |
phy: Add new Exynos USB 2.0 PHY driver Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic PHY framework. The driver includes support for the Exynos 4x10 and 4x1
phy: Add new Exynos USB 2.0 PHY driver Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic PHY framework. The driver includes support for the Exynos 4x10 and 4x12 SoC families. Signed-off-by: Kamil Debski <k.debski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
a70143bb |
| 03-Mar-2014 |
Kishon Vijay Abraham I <kishon@ti.com> |
drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3 driver in drivers/usb/phy to drivers/p
drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3 driver in drivers/usb/phy to drivers/phy and also renamed the file to phy-ti-pipe3 since this same driver will be used for SATA PHY and PCIE PHY. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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#
ba4bdc9e |
| 01-Mar-2014 |
Hans de Goede <hdegoede@redhat.com> |
PHY: sunxi: Add driver for sunxi usb phy The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed through a single set of registers. Besides this there are also some othe
PHY: sunxi: Add driver for sunxi usb phy The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed through a single set of registers. Besides this there are also some other phy related bits which need poking, which are per phy, but shared between the ohci and ehci controllers, so these are also controlled from this new phy driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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