#
7c91a92e |
| 02-Dec-2018 |
Jerin Jacob <jerinjacobk@gmail.com> |
octeontx2-af: Define all NIX_AF_RX_DEF_* registers
In order to support all NIX specific valid length errors and checksum errors on Rx, Update all NIX_AF_RX_DEF_* registers.
Also sorted all register
octeontx2-af: Define all NIX_AF_RX_DEF_* registers
In order to support all NIX specific valid length errors and checksum errors on Rx, Update all NIX_AF_RX_DEF_* registers.
Also sorted all registers in HRM definition order.
Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
e2703c5f |
| 02-Dec-2018 |
Nithin Dabilpuram <ndabilpuram@marvell.com> |
octeontx2-af: Allow freeing single TLx Tx schedule queue
The default behavior was to free all the TLx Tx schedule queues. This patch adds support for freeing a single Tx schedule queue if TXSCHQ_FRE
octeontx2-af: Allow freeing single TLx Tx schedule queue
The default behavior was to free all the TLx Tx schedule queues. This patch adds support for freeing a single Tx schedule queue if TXSCHQ_FREE_ALL flag is not set.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
26dda7da |
| 02-Dec-2018 |
Nithin Dabilpuram <ndabilpuram@marvell.com> |
octeontx2-af: Restrict TL1 allocation and configuration
TL1 is the root node in the scheduling hierarchy and it is a global resource with a limited number.
This patch introduces restriction and val
octeontx2-af: Restrict TL1 allocation and configuration
TL1 is the root node in the scheduling hierarchy and it is a global resource with a limited number.
This patch introduces restriction and validation on the allocation of the TL1 nodes for the effective resource sharing across the AF consumers.
- Limit TL1 allocation to 2 per lmac. One could be for the normal link and one for IEEE802.3br express link (Express Send DMA). Effectively all the VF's of an RVU PF(lmac) share the two TL1 schqs. - TL1 cannot be freed once allocated. - Allow VF's to only apply default config to TL1 if not already applied. PF's can always overwrite the TL1 config. - Consider NIX_AQ_INSTOP_WRITE while validating txschq when sq.ena is set.
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
7ee74697 |
| 02-Dec-2018 |
Jerin Jacob <jerinjacobk@gmail.com> |
octeontx2-af: Add support for runtime RSS algo index reservation
Introduced reserve_flowkey_alg_idx()to reserve RSS algorithm index, it would internally use set_flowkey_fields() to generate fields b
octeontx2-af: Add support for runtime RSS algo index reservation
Introduced reserve_flowkey_alg_idx()to reserve RSS algorithm index, it would internally use set_flowkey_fields() to generate fields based on the flow key dynamically.
On AF driver init, it would reserve a predefined set RSS algo indexes, which will be available all the time for all the AF driver consumers. The leftover algo indexes can be reserved at runtime through exiting nix_rss_flowkey_cfg mailbox message.
The NIX_FLOW_KEY_TYPE_PORT is removed from predefined a set of RSS flow type as it is not used by any consumer.
Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
b648366c |
| 02-Dec-2018 |
Jerin Jacob <jerinjacobk@gmail.com> |
octeontx2-af: Add support for dynamic flow cfg to RSS field generation
Introduce state-based algorithm to convert the flow_key value to RSS algo field used by NIX_AF_RX_FLOW_KEY_ALGX_FIELDX register
octeontx2-af: Add support for dynamic flow cfg to RSS field generation
Introduce state-based algorithm to convert the flow_key value to RSS algo field used by NIX_AF_RX_FLOW_KEY_ALGX_FIELDX register.
The outer `for loop` goes over _all_ protocol field and the following variables depict the state machine forward progress logic.
a) keyoff_marker - Enabled when hash byte length needs to be accounted in field->key_offset update. b) field_marker - Enabled when a new field needs to be selected. c) group_member - Enabled when a protocol is part of a group.
This would remove the existing hard coding and enable to add new protocol support seamlessly.
Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
bd522d68 |
| 02-Dec-2018 |
Jerin Jacob <jerinjacobk@gmail.com> |
octeontx2-af: Add response for RSS flow key cfg message
Added response for nix_rss_flowkey_cfg message to return selected RSS algorithm index.
The FLOW_KEY_TYPE* definition is part of the mbox mess
octeontx2-af: Add response for RSS flow key cfg message
Added response for nix_rss_flowkey_cfg message to return selected RSS algorithm index.
The FLOW_KEY_TYPE* definition is part of the mbox message and it will be used by the other consumers of AF driver hence moving to mbox.h.
Also renamed FLOW_* definitions to NIX_FLOW_* to avoid global name space collisions, as we have various coming from include/uapi/linux/pkt_cls.h for example.
Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
c5e4e4d1 |
| 02-Dec-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Skip NIXLF check for bcast MCE entry
At the time of initial broadcast packet replication table init, NIXLFs are not yet attached to PF_FUNCs. Hence skipped checking NIXLF while submitt
octeontx2-af: Skip NIXLF check for bcast MCE entry
At the time of initial broadcast packet replication table init, NIXLFs are not yet attached to PF_FUNCs. Hence skipped checking NIXLF while submitting MCE entry init instruction to NIX admin queue.
Also did a minor cleanup while installing bcast match entry in packet parser unit i.e NPC.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.19.6, v4.19.5, v4.19.4 |
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#
12e4c9ab |
| 22-Nov-2018 |
Linu Cherian <lcherian@marvell.com> |
octeontx2-af: Handle non-contiguous CGX LMAC interfaces
For this, cgx_id(struct cgx) definition has been changed to reflect cgx port id instead of device instance id. Now cgx_id can be directly used
octeontx2-af: Handle non-contiguous CGX LMAC interfaces
For this, cgx_id(struct cgx) definition has been changed to reflect cgx port id instead of device instance id. Now cgx_id can be directly used as channel offset for NPC configuration. Assumptions on contiguous cgx port ids has been removed from nix_calibrate_x2p as well.
As a side effect, allocation of conversion tables that were based on cgx count are changed to cgx port id max value. Tables would return NULL for invalid cgx ports.
Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.18.20, v4.19.3 |
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#
e12890f4 |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Workarounds for HW errata
Errata 35038 Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets the RX data path before configuration changes (e.g. disabling one or
octeontx2-af: Workarounds for HW errata
Errata 35038 Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets the RX data path before configuration changes (e.g. disabling one or more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC [ENA] too early.
Errata 35057 NIX may corrupt internal state when conditional clocks turn off. So turnon all clocks by default.
Errata 35786 Parse nibble enable NPC configuration for KEY generation has to be identical for both Rx and Tx interfaces.
Also corrected endianness configuration for NIX i.e NIX_AF_CFG[AF_BE] is bit8 and not bit1.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
8bb991c5 |
| 19-Nov-2018 |
Tomasz Duszynski <tduszynski@marvell.com> |
octeontx2-af: Configure AF VFs to talk over LBK channels
Configure AF VFs such that they are able to talk over consecutive loopback channels.
If 8 VFs are attached to AF then communication will wor
octeontx2-af: Configure AF VFs to talk over LBK channels
Configure AF VFs such that they are able to talk over consecutive loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX lbk0 -> lbk1 lbk1 -> lbk0
lbk2 -> lbk3 lbk3 -> lbk2
lbk4 -> lbk5 lbk5 -> lbk4
lbk6 -> lbk7 lbk7 -> lbk6
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
c554f9c1 |
| 19-Nov-2018 |
Geetha sowjanya <gakula@marvell.com> |
octeontx2-af: Teardown NPA, NIX LF upon receiving FLR
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup resources held by that PF_FUNC. This patch cleans up, NIX LF - Stop ingress/egress tra
octeontx2-af: Teardown NPA, NIX LF upon receiving FLR
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup resources held by that PF_FUNC. This patch cleans up, NIX LF - Stop ingress/egress traffic - Disable NPC MCAM entries being used. - Free Tx scheduler queues - Disable RQ/SQ/CQ HW contexts NPA LF - Disable Pool/Aura HW contexts In future teardown of SSO/SSOW/TIM/CPT will be added.
Also added a mailbox message for a RVU PF to request AF, to perform FLR for a RVU VF under it.
Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
f325d3f4 |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Verify NPA/SSO/NIX PF_FUNC mapping
While mapping a NIX LF to a NPA LF attached PF_FUNC or SSO LF attached PF_FUNC, verify if PF_FUNC is valid and if that PF_FUNC has a LF of that block
octeontx2-af: Verify NPA/SSO/NIX PF_FUNC mapping
While mapping a NIX LF to a NPA LF attached PF_FUNC or SSO LF attached PF_FUNC, verify if PF_FUNC is valid and if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
86cea61d |
| 19-Nov-2018 |
Tomasz Duszynski <tduszynski@marvell.com> |
octeontx2-af: Add support for stripping STAG/CTAG
This works by shadowing existing UCAST MCAM entry with a new one additionally matching either NPC_LT_LB_CTAG or NPC_LT_LB_STAG. For this to fully wo
octeontx2-af: Add support for stripping STAG/CTAG
This works by shadowing existing UCAST MCAM entry with a new one additionally matching either NPC_LT_LB_CTAG or NPC_LT_LB_STAG. For this to fully work one needs to send properly configured NIX_VTAG_CFG message afterwards i.e with strip and capture enabled and type set to 0.
On receiving tagged packet NIX will remove outer VLAN and capture TCI in NIX_RX_PARSE_S.
Also simplified RX Vtag configuration flow With this setting STRIP/CAPTURE VTAG actions separately would be possible. Following combinations are possible: STRIP, STRIP and CAPTURE, CAPTURE or nothing (0 disables respective actions).
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
40df309e |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Support to enable/disable default MCAM entries
For a PF/VF with a NIXLF attached has default/reserved MCAM entries for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
octeontx2-af: Support to enable/disable default MCAM entries
For a PF/VF with a NIXLF attached has default/reserved MCAM entries for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be forwarded to NIXLF only after it's contexts are initialized. This patch keeps these default entries disabled and adds mbox messages for a PF/VF to enable these once NPA/NIXLF initialization is done. Likewise while PF/VF is being teared down, it can send the disable mailbox message to stop receiving traffic.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
f9274958 |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: NPC MCAM entry alloc/free support
This patch adds NPC MCAM entry management and support for allocating and freeing them via mailbox. Both contiguous and non-contiguous allocations are
octeontx2-af: NPC MCAM entry alloc/free support
This patch adds NPC MCAM entry management and support for allocating and freeing them via mailbox. Both contiguous and non-contiguous allocations are supported. Incase of contiguous, if request cannot be met then max contiguous number of available entries are allocated.
High or low priority index allocation w.r.t a reference MCAM index is also supported.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
0964fc8f |
| 19-Nov-2018 |
Stanislaw Kardach <skardach@marvell.com> |
octeontx2-af: Relax resource lock into mutex
Mailbox message handling is done in a workqueue context scheduled from interrupt handler. So resource locks does not need to be a spinlock. Therefore rel
octeontx2-af: Relax resource lock into mutex
Mailbox message handling is done in a workqueue context scheduled from interrupt handler. So resource locks does not need to be a spinlock. Therefore relax them into a mutex so that later on we may use them in routines that might sleep.
Signed-off-by: Stanislaw Kardach <skardach@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
34425e8c |
| 19-Nov-2018 |
Kiran Kumar <kirankumark@marvell.com> |
octeontx2-af: Support to get NIX HW constants from AF
This patch adds reading HW limits like number of Rx/Tx stats, number of queue IRQs supported per NIX LF from AF registers and sync them to PF/VF
octeontx2-af: Support to get NIX HW constants from AF
This patch adds reading HW limits like number of Rx/Tx stats, number of queue IRQs supported per NIX LF from AF registers and sync them to PF/VF.
Signed-off-by: Kiran Kumar <kirankumark@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
9b7dd87a |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Support to modify min/max allowed packet lengths
This patch adds support for RVU PF/VFs to modify min/max packet lengths allowed by HW. For VFs on PF0, settings will be automatically a
octeontx2-af: Support to modify min/max allowed packet lengths
This patch adds support for RVU PF/VFs to modify min/max packet lengths allowed by HW. For VFs on PF0, settings will be automatically applied on LBK link. RX link's min/maxlen is configured to min/max of PF and it's all VFs. On the TX side if requested all SMQs attached to the requesting NIXLF will be updated with new min/max lengths.
Also updates transmit credits for Tx links based on new maxlen.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
eac66686 |
| 19-Nov-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Convert mbox handlers APIs to lowercase
This patch converts all mailbox message handler API names to lowercase.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: Davi
octeontx2-af: Convert mbox handlers APIs to lowercase
This patch converts all mailbox message handler API names to lowercase.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1 |
|
#
42d0f71c |
| 24-Oct-2018 |
Wei Yongjun <weiyongjun1@huawei.com> |
octeontx2-af: Use GFP_ATOMIC under spin lock
The function nix_update_mce_list() is called from nix_update_bcast_mce_list(), and a spin lock is held here, so we should use GFP_ATOMIC instead.
Fixes:
octeontx2-af: Use GFP_ATOMIC under spin lock
The function nix_update_mce_list() is called from nix_update_bcast_mce_list(), and a spin lock is held here, so we should use GFP_ATOMIC instead.
Fixes: 4b05528ebf0c ("octeontx2-af: Update bcast list upon NIXLF alloc/free") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
cdaa18f9 |
| 24-Oct-2018 |
Dan Carpenter <dan.carpenter@oracle.com> |
octeontx2-af: Copy the right amount of memory
This is a copy and paste bug where we copied the sizeof() from the chunk before. We're copying more data than intended but the destination is a union s
octeontx2-af: Copy the right amount of memory
This is a copy and paste bug where we copied the sizeof() from the chunk before. We're copying more data than intended but the destination is a union so it doesn't cause memory corruption.
Fixes: ffb0abd7e9cb ("octeontx2-af: NIX AQ instruction enqueue support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d6f092ca |
| 22-Oct-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modes
By default NIXLF is set in UCAST mode. This patch adds a new mailbox message which when sent by a RVU PF changes this default mode. Whe
octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modes
By default NIXLF is set in UCAST mode. This patch adds a new mailbox message which when sent by a RVU PF changes this default mode. When promiscuous mode is needed, the reserved promisc entry for each of RVU PF is setup to match against ingress channel number only, so that all pkts on that channel are accepted and forwarded to the mode change requesting PF_FUNC's NIXLF.
PROMISC and ALLMULTI modes are supported only for PFs, for VFs only UCAST mode is supported.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
6f03cf10 |
| 22-Oct-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Support for setting MAC address
Added a new mailbox message for a PF/VF to set/update it's NIXLF's MAC address. Also updates unicast NPC MCAM entry with this address as matching DMAC.
octeontx2-af: Support for setting MAC address
Added a new mailbox message for a PF/VF to set/update it's NIXLF's MAC address. Also updates unicast NPC MCAM entry with this address as matching DMAC.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
cc96b0e9 |
| 22-Oct-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: Support for changing RSS algorithm
This patch adds support for a RVU PF/VF to change NIX Rx flowkey algorithm index in NPC RX RSS_ACTION. eg: a ethtool command changing RSS algorithm f
octeontx2-af: Support for changing RSS algorithm
This patch adds support for a RVU PF/VF to change NIX Rx flowkey algorithm index in NPC RX RSS_ACTION. eg: a ethtool command changing RSS algorithm for a netdev interface would trigger this change in NPC.
If PF/VF doesn't specify any MCAM entry index then default UCAST entry of the NIXLF attached to PF/VF will be updated with RSS_ACTION and flowkey index.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
41a7aa7b |
| 22-Oct-2018 |
Sunil Goutham <sgoutham@marvell.com> |
octeontx2-af: NIX Rx flowkey configuration for RSS
Configure NIX RX flowkey algorithm configuration to support RSS (receive side scaling). Currently support for only L3/L4 2-tuple and 4-tuple hash o
octeontx2-af: NIX Rx flowkey configuration for RSS
Configure NIX RX flowkey algorithm configuration to support RSS (receive side scaling). Currently support for only L3/L4 2-tuple and 4-tuple hash of IPv4/v6/TCP/UDP/SCTP is added. HW supports upto 32 different flowkey algorithms which SW can define, this patch defines 9. NPC RX ACTION has to point to one of these flowkey indices for RSS to work.
The configuration is dependent on NPC parse result's layer info. So if NPC KPU profile changes suchthat LID/LTYPE values of above said protocols change then this configuration will most likely be effected.
Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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