Revision tags: v4.16 |
|
#
ae06c70b |
| 22-Mar-2018 |
Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
intel: add SPDX identifiers to all the Intel drivers
Add the SPDX identifiers to all the Intel wired LAN driver files, as outlined in Documentation/process/license-rules.rst.
Signed-off-by: Jeff Ki
intel: add SPDX identifiers to all the Intel drivers
Add the SPDX identifiers to all the Intel wired LAN driver files, as outlined in Documentation/process/license-rules.rst.
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.15 |
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#
3a532852 |
| 01-Jan-2018 |
Daniel Hua <daniel.hua@ni.com> |
igb: Clear TXSTMP when ptp_tx_work() is timeout
Problem description: After ethernet cable connect and disconnect for several iterations on a device with i210, tx timestamp will stop being put into t
igb: Clear TXSTMP when ptp_tx_work() is timeout
Problem description: After ethernet cable connect and disconnect for several iterations on a device with i210, tx timestamp will stop being put into the socket.
Steps to reproduce: 1. Setup a device with i210 and wire it to a 802.1AS capable switch ( Extreme Networks Summit x440 is used in our case) 2. Have the gptp daemon running on the device and make sure it is synced with the switch 3. Have the switch disable and enable the port, wait for the device gets resynced with the switch 4. Iterates step 3 until the device is not albe to get resynced 5. Review the log in dmesg and you will see warning message "igb : clearing Tx timestamp hang"
Root cause: If ptp_tx_work() gets scheduled just before the port gets disabled, a LINK DOWN event will be processed before ptp_tx_work(), which may cause timeout in ptp_tx_work(). In the timeout logic, the TSYNCTXCTL's TXTT bit (Transmit timestamp valid bit) is not cleared, causing no new timestamp loaded to TXSTMP register. Consequently therefore, no new interrupt is triggerred by TSICR.TXTS bit and no more Tx timestamp send to the socket.
Signed-off-by: Daniel Hua <daniel.hua@ni.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.13.16, v4.14, v4.13.5, v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15 |
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#
e5f36ad1 |
| 03-May-2017 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: check for Tx timestamp timeouts during watchdog
The igb driver has logic to handle only one Tx timestamp at a time, using a state bit lock to avoid multiple requests at once.
It may be possibl
igb: check for Tx timestamp timeouts during watchdog
The igb driver has logic to handle only one Tx timestamp at a time, using a state bit lock to avoid multiple requests at once.
It may be possible, if incredibly unlikely, that a Tx timestamp event is requested but never completes. Since we use an interrupt scheme to determine when the Tx timestamp occurred we would never clear the state bit in this case.
Add an igb_ptp_tx_hang() function similar to the already existing igb_ptp_rx_hang() function. This function runs in the watchdog routine and makes sure we eventually recover from this case instead of permanently disabling Tx timestamps.
Note: there is no currently known way to cause this without hacking the driver code to force it.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
4ccdc013 |
| 03-May-2017 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: fix race condition with PTP_TX_IN_PROGRESS bits
Hardware related to the igb driver has a limitation of only handling one Tx timestamp at a time. Thus, the driver uses a state bit lock to enforc
igb: fix race condition with PTP_TX_IN_PROGRESS bits
Hardware related to the igb driver has a limitation of only handling one Tx timestamp at a time. Thus, the driver uses a state bit lock to enforce that only one timestamp request is honored at a time.
Unfortunately this suffers from a simple race condition. The bit lock is not cleared until after skb_tstamp_tx() is called notifying the stack of a new Tx timestamp. Even a well behaved application which sends only one timestamp request at once and waits for a response might wake up and send a new packet before the bit lock is cleared. This results in needlessly dropping some Tx timestamp requests.
We can fix this by unlocking the state bit as soon as we read the Timestamp register, as this is the first point at which it is safe to unlock.
To avoid issues with the skb pointer, we'll use a copy of the pointer and set the global variable in the driver structure to NULL first. This ensures that the next timestamp request does not modify our local copy of the skb pointer.
This ensures that well behaved applications do not accidentally race with the unlock bit. Obviously an application which sends multiple Tx timestamp requests at once will still only timestamp one packet at a time. Unfortunately there is nothing we can do about this.
Reported-by: David Mirabito <davidm@metamako.com> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
e3412575 |
| 19-May-2017 |
Miroslav Lichvar <mlichvar@redhat.com> |
net: ethernet: update drivers to handle HWTSTAMP_FILTER_NTP_ALL
Include HWTSTAMP_FILTER_NTP_ALL in net_hwtstamp_validate() as a valid filter and update drivers which can timestamp all packets, or wh
net: ethernet: update drivers to handle HWTSTAMP_FILTER_NTP_ALL
Include HWTSTAMP_FILTER_NTP_ALL in net_hwtstamp_validate() as a valid filter and update drivers which can timestamp all packets, or which explicitly list unsupported filters instead of using a default case, to handle the filter.
CC: Richard Cochran <richardcochran@gmail.com> CC: Willem de Bruijn <willemb@google.com> Signed-off-by: Miroslav Lichvar <mlichvar@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10 |
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#
3456fd53 |
| 06-Feb-2017 |
Alexander Duyck <alexander.h.duyck@intel.com> |
igb: Use page_address offset from page instead of masking virtual address
Update the handling of page addresses so that we always refer to them using a void pointer, and try to use the consistent na
igb: Use page_address offset from page instead of masking virtual address
Update the handling of page addresses so that we always refer to them using a void pointer, and try to use the consistent name of va indicating we are working with a virtual address.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
a5a1d1c2 |
| 21-Dec-2016 |
Thomas Gleixner <tglx@linutronix.de> |
clocksource: Use a plain u64 instead of cycle_t
There is no point in having an extra type for extra confusion. u64 is unambiguous.
Conversion was done with the following coccinelle script:
@rem@ @
clocksource: Use a plain u64 instead of cycle_t
There is no point in having an extra type for extra confusion. u64 is unambiguous.
Conversion was done with the following coccinelle script:
@rem@ @@ -typedef u64 cycle_t;
@fix@ typedef cycle_t; @@ -cycle_t +u64
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: John Stultz <john.stultz@linaro.org>
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Revision tags: v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31 |
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#
c79e975e |
| 08-Nov-2016 |
Richard Cochran <richardcochran@gmail.com> |
ptp: igb: Use the high resolution frequency method.
The 82580 and related devices offer a frequency resolution of about 0.029 ppb. This patch lets users of the device benefit from the increased fre
ptp: igb: Use the high resolution frequency method.
The 82580 and related devices offer a frequency resolution of about 0.029 ppb. This patch lets users of the device benefit from the increased frequency resolution when tuning the clock.
Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4 |
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#
ac28b41a |
| 09-Sep-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: restore PPS signal on igb_ptp_reset
When a reset occurs, the PPS SYS_WRAP interrupt was not re-enabled which resulted in disabling of the PPS signaling. Fix this by recording when the interrupt
igb: restore PPS signal on igb_ptp_reset
When a reset occurs, the PPS SYS_WRAP interrupt was not re-enabled which resulted in disabling of the PPS signaling. Fix this by recording when the interrupt is on and ensuring that we re-enable it every time we reset.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
efee95f4 |
| 20-Sep-2016 |
Nicolas Pitre <nicolas.pitre@linaro.org> |
ptp_clock: future-proofing drivers against PTP subsystem becoming optional
Drivers must be ready to accept NULL from ptp_clock_register() if the PTP clock subsystem is configured out.
This patch do
ptp_clock: future-proofing drivers against PTP subsystem becoming optional
Drivers must be ready to accept NULL from ptp_clock_register() if the PTP clock subsystem is configured out.
This patch documents that and ensures that all drivers cope well with a NULL return.
Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Eugenia Emantayev <eugenia@mellanox.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4 |
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#
64c75d41 |
| 06-Jul-2016 |
Gangfeng Huang <gangfeng.huang@ni.com> |
igb: support RX flow classification by ethertype
This patch is meant to allow for RX network flow classification to insert and remove ethertype filter by ethtool
Example: Add an ethertype filter: $
igb: support RX flow classification by ethertype
This patch is meant to allow for RX network flow classification to insert and remove ethertype filter by ethtool
Example: Add an ethertype filter: $ ethtool -N eth0 flow-type ether proto 0x88F8 action 2
Show all filters: $ ethtool -n eth0 4 RX rings available Total 1 rules
Filter: 15 Flow Type: Raw Ethernet Src MAC addr: 00:00:00:00:00:00 mask: FF:FF:FF:FF:FF:FF Dest MAC addr: 00:00:00:00:00:00 mask: FF:FF:FF:FF:FF:FF Ethertype: 0x88F8 mask: 0x0 Action: Direct to queue 2
Delete the filter by location: $ ethtool -N delete 15
Signed-off-by: Ruhao Gao <ruhao.gao@ni.com> Signed-off-by: Gangfeng Huang <gangfeng.huang@ni.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
0066c8b6 |
| 16-Jul-2016 |
Kshitiz Gupta <kshitiz.gupta@ni.com> |
igb: fix adjusting PTP timestamps for Tx/Rx latency
Fix PHY delay compensation math in igb_ptp_tx_hwtstamp() and igb_ptp_rx_rgtstamp. Add PHY delay compensation in igb_ptp_rx_pktstamp().
In the IGB
igb: fix adjusting PTP timestamps for Tx/Rx latency
Fix PHY delay compensation math in igb_ptp_tx_hwtstamp() and igb_ptp_rx_rgtstamp. Add PHY delay compensation in igb_ptp_rx_pktstamp().
In the IGB driver, there are two functions that retrieve timestamps received by the PHY - igb_ptp_rx_rgtstamp() and igb_ptp_rx_pktstamp(). The previous commit only changed igb_ptp_rx_rgtstamp(), and the change was incorrect.
There are two instances in which PHY delay compensations should be made:
- Before the packet transmission over the PHY, the latency between when the packet is timestamped and transmission of the packets, should be an add operation, but it is currently a subtract.
- After the packets are received from the PHY, the latency between the receiving and timestamping of the packets should be a subtract operation, but it is currently an add.
Signed-off-by: Kshitiz Gupta <kshitiz.gupta@ni.com> Fixes: 3f544d2 (igb: adjust ptp timestamps for tx/rx latency) Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.6.3, v4.4.14, v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12 |
|
#
e3f2350d |
| 24-May-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: implement igb_ptp_suspend
Make igb_ptp_stop take advantage of this new function to reduce code duplication.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron
igb: implement igb_ptp_suspend
Make igb_ptp_stop take advantage of this new function to reduce code duplication.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
4f3ce71b |
| 24-May-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: re-use igb_ptp_reset in igb_ptp_init
Modify igb_ptp_init to take advantage of igb_ptp_reset, and remove duplicated work that was occurring in both igb_ptp_reset and igb_ptp_init.
In total, res
igb: re-use igb_ptp_reset in igb_ptp_init
Modify igb_ptp_init to take advantage of igb_ptp_reset, and remove duplicated work that was occurring in both igb_ptp_reset and igb_ptp_init.
In total, resetting the TSAUXC register, and resetting the system time both happen in igb_ptp_reset already. igb_ptp_reset now also takes care of starting the delayed work item for overflow checks, as well.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
63737166 |
| 24-May-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: introduce IGB_PTP_OVERFLOW_CHECK flag
Don't continue to use complex MAC type checks for handling various cases where we have overflow check code. Make this code more obvious by introducing a fl
igb: introduce IGB_PTP_OVERFLOW_CHECK flag
Don't continue to use complex MAC type checks for handling various cases where we have overflow check code. Make this code more obvious by introducing a flag which is enabled for hardware that needs these checks.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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#
462f1188 |
| 24-May-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: introduce ptp_flags variable and use it to replace IGB_FLAG_PTP
Upcoming patches will introduce new PTP specific flags. To avoid cluttering the normal flags variable, introduce PTP specific "pt
igb: introduce ptp_flags variable and use it to replace IGB_FLAG_PTP
Upcoming patches will introduce new PTP specific flags. To avoid cluttering the normal flags variable, introduce PTP specific "ptp_flags" variable for this purpose, and move IGB_FLAG_PTP to become IGB_PTP_ENABLED.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9 |
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#
3f544d2a |
| 03-May-2016 |
Nathan Sullivan <nathan.sullivan@ni.com> |
igb: adjust PTP timestamps for Tx/Rx latency
Table 7-62 on page 338 of the i210 datasheet lists TX and RX latencies for the various speeds the chip supports. To give better PTP timestamp accuracy,
igb: adjust PTP timestamps for Tx/Rx latency
Table 7-62 on page 338 of the i210 datasheet lists TX and RX latencies for the various speeds the chip supports. To give better PTP timestamp accuracy, adjust the timestamps by the amounts Intel gives based on current link speed.
Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.4.8 |
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#
a51d8c21 |
| 13-Apr-2016 |
Jacob Keller <jacob.e.keller@intel.com> |
igb: use BIT() macro or unsigned prefix
For bitshifts, we should make use of the BIT macro when possible, and ensure that other bitshifts are marked as unsigned. This helps prevent signed bitshift e
igb: use BIT() macro or unsigned prefix
For bitshifts, we should make use of the BIT macro when possible, and ensure that other bitshifts are marked as unsigned. This helps prevent signed bitshift errors, and ensures similar style.
Make use of GENMASK and the unsigned postfix where BIT() isn't appropriate.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1 |
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#
569f3b3d |
| 11-Jan-2016 |
Roland Hii <roland.king.guan.hii@intel.com> |
igb: add conditions for I210 to generate periodic clock output
In general case the maximum supported half cycle time of the synchronized output clock is 70msec. Slower half cycle time than 70msec ca
igb: add conditions for I210 to generate periodic clock output
In general case the maximum supported half cycle time of the synchronized output clock is 70msec. Slower half cycle time than 70msec can be programmed also as long as the output clock is synchronized to whole seconds, useful specifically for generating a 1Hz clock.
Permitted values for the clock half cycle time are: 125,000,000 decimal, 250,000,000 decimal and 500,000,000 decimal (equals to 125msec, 250msec and 500msec respectively).
Before this patch, only the half cycle time of less than or equal to 70msec uses the I210 clock output function. This patch adds additional conditions when half cycle time is equal to 125msec or 250msec or 500msec to use clock output function.
Under other conditions, interrupt driven target time output events method is still used to generate the desired clock output.
Signed-off-by: Roland Hii <roland.king.guan.hii@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1 |
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#
40c9b079 |
| 30-Sep-2015 |
Arnd Bergmann <arnd@arndb.de> |
net: igb: avoid using timespec
We want to deprecate the use of 'struct timespec' on 32-bit architectures, as it is will overflow in 2038. The igb driver uses it to read the current time, and can sim
net: igb: avoid using timespec
We want to deprecate the use of 'struct timespec' on 32-bit architectures, as it is will overflow in 2038. The igb driver uses it to read the current time, and can simply be changed to use ktime_get_real_ts64() instead.
Because of hardware limitations, there is still an overflow in year 2106, which we cannot really avoid, but this documents the overflow.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: intel-wired-lan@lists.osuosl.org Reviewed-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4 |
|
#
30c72916 |
| 23-Jul-2015 |
Richard Cochran <richardcochran@gmail.com> |
igb: implement high frequency periodic output signals
In addition to interrupt driven target time output events, the i210 also has two programmable clock outputs. These clocks support periods betwe
igb: implement high frequency periodic output signals
In addition to interrupt driven target time output events, the i210 also has two programmable clock outputs. These clocks support periods between 16 nanoseconds and 140 milliseconds. This patch implements the periodic output function using the clock outputs when possible, falling back to the target time for longer periods.
Signed-off-by: Richard Cochran <richardcochran@gmail.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Revision tags: v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8 |
|
#
58c98be1 |
| 11-Jun-2015 |
Richard Cochran <richardcochran@gmail.com> |
net: igb: fix the start time for periodic output signals
When programming the start of a periodic output, the code wrongly places the seconds value into the "low" register and the nanoseconds into t
net: igb: fix the start time for periodic output signals
When programming the start of a periodic output, the code wrongly places the seconds value into the "low" register and the nanoseconds into the "high" register. Even though this is backwards, it slipped through my testing, because the re-arming code in the interrupt service routine is correct, and the signal does appear starting with the second edge.
This patch fixes the issue by programming the registers correctly.
Signed-off-by: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2, v4.1-rc1, v4.0, v4.0-rc7 |
|
#
350f66d5 |
| 31-Mar-2015 |
Richard Cochran <richardcochran@gmail.com> |
ptp: igb: use helpers for converting ns to timespec.
This patch changes the driver to use ns_to_timespec64() and timespec64_to_ns() instead of open coding the same logic.
Compile tested only.
Sign
ptp: igb: use helpers for converting ns to timespec.
This patch changes the driver to use ns_to_timespec64() and timespec64_to_ns() instead of open coding the same logic.
Compile tested only.
Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.0-rc6 |
|
#
d4c496fe |
| 29-Mar-2015 |
Richard Cochran <richardcochran@gmail.com> |
ptp: igb: convert to the 64 bit get/set time methods.
For the 82576, the driver's clock is implemented using a timecounter, and so with this patch that device is ready for the year 2038.
However, i
ptp: igb: convert to the 64 bit get/set time methods.
For the 82576, the driver's clock is implemented using a timecounter, and so with this patch that device is ready for the year 2038.
However, in the case of the i210, the device stores the number of seconds in a 32 bit register. Therefore, more work is needed on this driver before the year 2038 comes around.
Compile tested only.
Signed-off-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v4.0-rc5, v4.0-rc4, v4.0-rc3 |
|
#
dbedd44e |
| 06-Mar-2015 |
Joe Perches <joe@perches.com> |
ethernet: codespell comment spelling fixes
To test a checkpatch spelling patch, I ran codespell against drivers/net/ethernet/.
$ git ls-files drivers/net/ethernet/ | \ while read file ; do \
ethernet: codespell comment spelling fixes
To test a checkpatch spelling patch, I ran codespell against drivers/net/ethernet/.
$ git ls-files drivers/net/ethernet/ | \ while read file ; do \ codespell -w $file; \ done
I removed a false positive in e1000_hw.h
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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