#
ee320674 |
| 19-Jul-2016 |
Ritesh Harjani <riteshh@codeaurora.org> |
mmc: sdhci-msm: Add set_uhs_signaling() implementation
To allow UHS mode to work properly, we need to implement a Qualcomm specific set_uhs_signaling() callback function. This function differs from
mmc: sdhci-msm: Add set_uhs_signaling() implementation
To allow UHS mode to work properly, we need to implement a Qualcomm specific set_uhs_signaling() callback function. This function differs from the sdhci_set_uhs_signaling() in that we need check the clock rate and enable UHS timing only if the frequency is above 100MHz.
This patch resolves the mmc_select_hs200 timeouts noticed after merging commit a5c1f3e55c99 ("mmc: mmc: do not use CMD13 to get status after speed mode switch")
mmc0: mmc_select_hs200 failed, error -110 mmc0: error -110 whilst initialising MMC card mmc0: Reset 0x1 never completed. sdhci: =========== REGISTER DUMP (mmc0)=========== sdhci: Sys addr: 0x00000000 | Version: 0x00002e02 sdhci: Blk size: 0x00004000 | Blk cnt: 0x00000000 sdhci: Argument: 0x00000000 | Trn mode: 0x00000000 sdhci: Present: 0x01f80000 | Host ctl: 0x00000000 sdhci: Power: 0x00000000 | Blk gap: 0x00000000 sdhci: Wake-up: 0x00000000 | Clock: 0x00000003 sdhci: Timeout: 0x00000000 | Int stat: 0x00000000 sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000 sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000 sdhci: Caps: 0x322dc8b2 | Caps_1: 0x00008007 sdhci: Cmd: 0x00000000 | Max curr: 0x00000000 sdhci: Host ctl2: 0x00000000 sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000 sdhci: ===========================================
Fixes: a5c1f3e55c99 ("mmc: mmc: do not use CMD13 to get status after...") Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
9718f84b |
| 24-Jun-2016 |
Georgi Djakov <georgi.djakov@linaro.org> |
mmc: sdhci-msm: Do not reset the controller if no card in the slot
The controller does not clear the "reset bit" when it is reset without a card in the slot. Because of this, the following error mes
mmc: sdhci-msm: Do not reset the controller if no card in the slot
The controller does not clear the "reset bit" when it is reset without a card in the slot. Because of this, the following error message is seen while booting with no plugged SD card.
mmc1: Reset 0x1 never completed.
Add the SDHCI_QUIRK_NO_CARD_NO_RESET quirk to avoid this.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
2801b95e |
| 23-Jun-2016 |
Colin Ian King <colin.king@canonical.com> |
mmc: sdhci-msm: fix spelling mistake: "Perpheral" -> "Peripheral"
trivial fix to spelling mistake in dev_err message
Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Adrian Hunter
mmc: sdhci-msm: fix spelling mistake: "Perpheral" -> "Peripheral"
trivial fix to spelling mistake in dev_err message
Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12, openbmc-20160521-1, v4.4.11, openbmc-20160518-1, v4.6, v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2 |
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#
6f699531 |
| 16-Feb-2016 |
Jisheng Zhang <jszhang@marvell.com> |
mmc: sdhci-msm: use sdhci_pltfm_init for private allocation
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to
mmc: sdhci-msm: use sdhci_pltfm_init for private allocation
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
a50396a4 |
| 16-Feb-2016 |
Jisheng Zhang <jszhang@marvell.com> |
mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_host
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_
mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_host
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_msm_host and uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also marks sdhci_msm_ops as const.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1 |
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#
9979dbe5 |
| 27-Oct-2015 |
Chaotian Jing <chaotian.jing@mediatek.com> |
mmc: mmc: extend the mmc_send_tuning()
The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() t
mmc: mmc: extend the mmc_send_tuning()
The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() to determine the opcode by bus width, assume eMMC was running at HS200, 4bit mode, then the mmc_send_tuning() will overwrite the opcode from CMD21 to CMD19, then got error.
in addition, extend an argument of "cmd_error" to allow getting if there was cmd error when tune response.
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> [Ulf: Rebased patch] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2 |
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#
951b8c87 |
| 06-Jul-2015 |
Ivan T. Ivanov <ivan.ivanov@linaro.org> |
mmc: sdhci-msm: Boost controller core clock
Ensure SDCC is working with maximum clock otherwise card detection could be extremely slow, up to 7 seconds.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@l
mmc: sdhci-msm: Boost controller core clock
Ensure SDCC is working with maximum clock otherwise card detection could be extremely slow, up to 7 seconds.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2, v4.1-rc1, v4.0, v4.0-rc7, v4.0-rc6 |
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#
3a3ad3e9 |
| 23-Mar-2015 |
Georgi Djakov <georgi.djakov@linaro.org> |
mmc: sdhci-msm: Add support for vendor capabilities registers
Some versions of this controller do not advertise their 3.0v and 8bit bus-width support capabilities. It is required to explicitly set t
mmc: sdhci-msm: Add support for vendor capabilities registers
Some versions of this controller do not advertise their 3.0v and 8bit bus-width support capabilities. It is required to explicitly set these capabilities for the specific controller versions.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v4.0-rc5, v4.0-rc4, v4.0-rc3, v4.0-rc2, v4.0-rc1, v3.19, v3.19-rc7, v3.19-rc6, v3.19-rc5, v3.19-rc4, v3.19-rc3, v3.19-rc2, v3.19-rc1, v3.18 |
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#
33d73935 |
| 05-Dec-2014 |
Ulf Hansson <ulf.hansson@linaro.org> |
mmc: sdhci-msm: Convert to mmc_send_tuning()
Instead of having a local hack taking care of sending the tuning command and as well to verify the response pattern, let's convert to the common mmc_send
mmc: sdhci-msm: Convert to mmc_send_tuning()
Instead of having a local hack taking care of sending the tuning command and as well to verify the response pattern, let's convert to the common mmc_send_tuning() API instead.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Georgi Djakov <gdjakov@mm-sol.com> Acked-by: Georgi Djakov <gdjakov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Revision tags: v3.18-rc7, v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3, v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7 |
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#
48d11e06 |
| 22-Sep-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
mmc: Consolidate emmc tuning blocks
The same tuning block exists in the dw_mmc h.c and sdhci-msm.c files. Move these into mmc.c so that they can be shared across drivers.
Reported-by: Jaehoon Chung
mmc: Consolidate emmc tuning blocks
The same tuning block exists in the dw_mmc h.c and sdhci-msm.c files. Move these into mmc.c so that they can be shared across drivers.
Reported-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
ffed1b94 |
| 22-Sep-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
mmc: sdhci-msm: Make tuning block table endian agnostic
If we're tuning on a big-endian CPU we'll never determine we properly tuned the device because we compare the data we received from the contro
mmc: sdhci-msm: Make tuning block table endian agnostic
If we're tuning on a big-endian CPU we'll never determine we properly tuned the device because we compare the data we received from the controller with a table that assumes the CPU is little-endian. Change the table to be an array of bytes instead of 32-bit words so we can use memcmp() without needing to byte-swap every word depending on the endianess of the CPU.
Cc: Asutosh Das <asutoshd@codeaurora.org> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com> Fixes: 415b5a75da43 "mmc: sdhci-msm: Add platform_execute_tuning implementation" Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v3.17-rc6, v3.17-rc5, v3.17-rc4, v3.17-rc3, v3.17-rc2, v3.17-rc1 |
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#
2137f5d3 |
| 12-Aug-2014 |
Peter Griffin <peter.griffin@linaro.org> |
mmc: remove .owner field for drivers using module_platform_driver
This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platfor
mmc: remove .owner field for drivers using module_platform_driver
This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5 |
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#
d30f01b0 |
| 11-Jul-2014 |
Georgi Djakov <gdjakov@mm-sol.com> |
mmc: sdhci-msm: Remove unnecessary header file inclusion
The header <linux/regulator/consumer.h> is unused. Remove it.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <
mmc: sdhci-msm: Remove unnecessary header file inclusion
The header <linux/regulator/consumer.h> is unused. Remove it.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v3.16-rc4, v3.16-rc3, v3.16-rc2, v3.16-rc1 |
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#
ed1761d7 |
| 10-Jun-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
mmc: sdhci-msm: Fix fallout from sdhci refactoring
The sdhci core was refactored recently and some of those refactorings required changes in every sdhci platform driver. Those updates happened aroun
mmc: sdhci-msm: Fix fallout from sdhci refactoring
The sdhci core was refactored recently and some of those refactorings required changes in every sdhci platform driver. Those updates happened around the same time as when the msm driver was merged so the refactorings missed the msm driver. Hook in the basic library functions so that we can boot apq8074 dragonboards again instead of crashing when we try to jump to NULL function pointers.
Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Georgi Djakov <gdjakov@mm-sol.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Georgi Djakov <gdjakov@mm-sol.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v3.15, v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8, v3.14-rc7 |
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#
415b5a75 |
| 10-Mar-2014 |
Georgi Djakov <gdjakov@mm-sol.com> |
mmc: sdhci-msm: Add platform_execute_tuning implementation
This patch adds implementation for platform specific tuning in order to support HS200 bus speed mode on Qualcomm SDHCI controller.
Signed-
mmc: sdhci-msm: Add platform_execute_tuning implementation
This patch adds implementation for platform specific tuning in order to support HS200 bus speed mode on Qualcomm SDHCI controller.
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
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#
0eb0d9f4 |
| 10-Mar-2014 |
Georgi Djakov <gdjakov@mm-sol.com> |
mmc: sdhci-msm: Initial support for Qualcomm chipsets
This platform driver adds the initial support of Secure Digital Host Controller Interface compliant controller found in Qualcomm chipsets.
Sign
mmc: sdhci-msm: Initial support for Qualcomm chipsets
This platform driver adds the initial support of Secure Digital Host Controller Interface compliant controller found in Qualcomm chipsets.
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org> Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
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#
3f8920c5 |
| 16-Jul-2021 |
Shaik Sajida Bhanu <sbhanu@codeaurora.org> |
mmc: sdhci-msm: Update the software timeout value for sdhc [ Upstream commit 67b13f3e221ed81b46a657e2b499bf8b20162476 ] Whenever SDHC run at clock rate 50MHZ or below, the hardware
mmc: sdhci-msm: Update the software timeout value for sdhc [ Upstream commit 67b13f3e221ed81b46a657e2b499bf8b20162476 ] Whenever SDHC run at clock rate 50MHZ or below, the hardware data timeout value will be 21.47secs, which is approx. 22secs and we have a current software timeout value as 10secs. We have to set software timeout value more than the hardware data timeout value to avioid seeing the below register dumps. [ 332.953670] mmc2: Timeout waiting for hardware interrupt. [ 332.959608] mmc2: sdhci: ============ SDHCI REGISTER DUMP =========== [ 332.966450] mmc2: sdhci: Sys addr: 0x00000000 | Version: 0x00007202 [ 332.973256] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000001 [ 332.980054] mmc2: sdhci: Argument: 0x00000000 | Trn mode: 0x00000027 [ 332.986864] mmc2: sdhci: Present: 0x01f801f6 | Host ctl: 0x0000001f [ 332.993671] mmc2: sdhci: Power: 0x00000001 | Blk gap: 0x00000000 [ 333.000583] mmc2: sdhci: Wake-up: 0x00000000 | Clock: 0x00000007 [ 333.007386] mmc2: sdhci: Timeout: 0x0000000e | Int stat: 0x00000000 [ 333.014182] mmc2: sdhci: Int enab: 0x03ff100b | Sig enab: 0x03ff100b [ 333.020976] mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000 [ 333.027771] mmc2: sdhci: Caps: 0x322dc8b2 | Caps_1: 0x0000808f [ 333.034561] mmc2: sdhci: Cmd: 0x0000183a | Max curr: 0x00000000 [ 333.041359] mmc2: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0x00000000 [ 333.048157] mmc2: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000 [ 333.054945] mmc2: sdhci: Host ctl2: 0x00000000 [ 333.059657] mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000ffffff218 [ 333.067178] mmc2: sdhci_msm: ----------- VENDOR REGISTER DUMP ----------- [ 333.074343] mmc2: sdhci_msm: DLL sts: 0x00000000 | DLL cfg: 0x6000642c | DLL cfg2: 0x0020a000 [ 333.083417] mmc2: sdhci_msm: DLL cfg3: 0x00000000 | DLL usr ctl: 0x00000000 | DDR cfg: 0x80040873 [ 333.092850] mmc2: sdhci_msm: Vndr func: 0x00008a9c | Vndr func2 : 0xf88218a8 Vndr func3: 0x02626040 [ 333.102371] mmc2: sdhci: ============================================ So, set software timeout value more than hardware timeout value. Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1626435974-14462-1-git-send-email-sbhanu@codeaurora.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8 |
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#
91ca244b |
| 09-Sep-2020 |
Viresh Kumar <viresh.kumar@linaro.org> |
mmc: sdhci-msm: Unconditionally call dev_pm_opp_of_remove_table() dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP
mmc: sdhci-msm: Unconditionally call dev_pm_opp_of_remove_table() dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/890ae5601594fca5de104695a682f4b6efbc631b.1599660554.git.viresh.kumar@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
5de1a3e3 |
| 07-Sep-2020 |
Ulf Hansson <ulf.hansson@linaro.org> |
Merge branch 'fixes' into next
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Revision tags: v5.8.7, v5.8.6, v5.4.62 |
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#
8c98644b |
| 02-Sep-2020 |
Douglas Anderson <dianders@chromium.org> |
mmc: sdhci-msm: Prefer asynchronous probe Turning on initcall debug on one system showed this: initcall sdhci_msm_driver_init+0x0/0x28 returned 0 after 34782 usecs The lion's
mmc: sdhci-msm: Prefer asynchronous probe Turning on initcall debug on one system showed this: initcall sdhci_msm_driver_init+0x0/0x28 returned 0 after 34782 usecs The lion's share of this time (~33 ms) was in mmc_power_up(). This shouldn't be terribly surprising since there are a few calls to delay based on "power_delay_ms" and the default delay there is 10 ms. Because we haven't specified that we'd prefer asynchronous probe for this driver then we'll wait for this driver to finish before we start probes for more drivers. While 33 ms doesn't sound like tons, every little bit counts. There should be little problem with turning on asynchronous probe for this driver. It's already possible that previous drivers may have turned on asynchronous probe so we might already have other things (that probed before us) probing at the same time we are anyway. This driver isn't really providing resources (clocks, regulators, etc) that other drivers need to probe and even if it was they should be handling -EPROBE_DEFER. Let's turn this on and get a bit of boot speed back. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200902164303.1.I5e598a25222b4534c0083b61dbfa4e0e76f66171@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
4dac686b |
| 27-Aug-2020 |
Veerabhadrarao Badiganti <vbadigan@codeaurora.org> |
mmc: sdhci-msm: Enable restore_dll_config flag for sc7180 target On sc7180 target, issues are observed with HS400 mode due to a hardware limitation. If sdcc clock is dynamically gated an
mmc: sdhci-msm: Enable restore_dll_config flag for sc7180 target On sc7180 target, issues are observed with HS400 mode due to a hardware limitation. If sdcc clock is dynamically gated and ungated, the very next command is failing with command CRC/timeout errors. To mitigate this issue, DLL phase has to be restored whenever sdcc clock is gated dynamically. The restore_dll_config ensures this. Enabling this flag with this change. And simply re-using the sdm845 target configuration for this flag. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1598541694-15694-1-git-send-email-vbadigan@codeaurora.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
9d5dcefb |
| 27-Aug-2020 |
Douglas Anderson <dianders@chromium.org> |
mmc: sdhci-msm: Add retries when all tuning phases are found valid As the comments in this patch say, if we tune and find all phases are valid it's _almost_ as bad as no phases being fou
mmc: sdhci-msm: Add retries when all tuning phases are found valid As the comments in this patch say, if we tune and find all phases are valid it's _almost_ as bad as no phases being found valid. Probably all phases are not really reliable but we didn't detect where the unreliable place is. That means we'll essentially be guessing and hoping we get a good phase. This is not just a problem in theory. It was causing real problems on a real board. On that board, most often phase 10 is found as the only invalid phase, though sometimes 10 and 11 are invalid and sometimes just 11. Some percentage of the time, however, all phases are found to be valid. When this happens, the current logic will decide to use phase 11. Since phase 11 is sometimes found to be invalid, this is a bad choice. Sure enough, when phase 11 is picked we often get mmc errors later in boot. I have seen cases where all phases were found to be valid 3 times in a row, so increase the retry count to 10 just to be extra sure. Fixes: 415b5a75da43 ("mmc: sdhci-msm: Add platform_execute_tuning implementation") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200827075809.1.If179abf5ecb67c963494db79c3bc4247d987419b@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51 |
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b5c833b7 |
| 08-Jul-2020 |
Veerabhadrarao Badiganti <vbadigan@codeaurora.org> |
mmc: sdhci-msm: Set IO pins in low power state during suspend Configure SDHC IO pins with low power configuration when the driver is in suspend state. Signed-off-by: Veerabhadra
mmc: sdhci-msm: Set IO pins in low power state during suspend Configure SDHC IO pins with low power configuration when the driver is in suspend state. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/1594213888-2780-2-git-send-email-vbadigan@codeaurora.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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abf4633a |
| 01-Jul-2020 |
Lee Jones <lee.jones@linaro.org> |
mmc: sdhci-msm: Demote faux kerneldoc header down to basic comment block __sdhci_msm_set_clock()'s function header is the only one in kerneldoc format. Which seems odd as it's not part
mmc: sdhci-msm: Demote faux kerneldoc header down to basic comment block __sdhci_msm_set_clock()'s function header is the only one in kerneldoc format. Which seems odd as it's not part of an external API and isn't referenced anywhere else. Seeing as there has also been no attempt to describe the expected function arguments either, we're going to assume that this is not actually a bona fide kerneldoc use-case. Fixes the following W=1 kernel build warnings: drivers/mmc/host/sdhci-msm.c:1595: warning: Function parameter or member 'host' not described in '__sdhci_msm_set_clock' drivers/mmc/host/sdhci-msm.c:1595: warning: Function parameter or member 'clock' not described in '__sdhci_msm_set_clock' Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200701124702.908713-14-lee.jones@linaro.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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53e888d1 |
| 01-Jul-2020 |
Hulk Robot <hulkci@huawei.com> |
mmc: sdhci-msm: Make function sdhci_msm_dump_vendor_regs() static Fix sparse build warning: drivers/mmc/host/sdhci-msm.c:1888:6: warning: symbol 'sdhci_msm_dump_vendor_regs' wa
mmc: sdhci-msm: Make function sdhci_msm_dump_vendor_regs() static Fix sparse build warning: drivers/mmc/host/sdhci-msm.c:1888:6: warning: symbol 'sdhci_msm_dump_vendor_regs' was not declared. Should it be static? Signed-off-by: Hulk Robot <hulkci@huawei.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20200702020347.77214-1-weiyongjun1@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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