#
6ddbd37f |
| 16-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations
Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details.
Signed-off-by: Evan Quan <evan
drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations
Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.2 |
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#
84176663 |
| 11-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)
Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for
drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)
Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for them.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
28a31774 |
| 11-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose the API used internally only in kv_dpm.c
Move it to kv_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-
drm/amd/pm: do not expose the API used internally only in kv_dpm.c
Move it to kv_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a79110f2 |
| 10-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose those APIs used internally only in si_dpm.c
Move them to si_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed
drm/amd/pm: do not expose those APIs used internally only in si_dpm.c
Move them to si_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d4481576 |
| 10-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose those APIs used internally only in amdgpu_dpm.c
Move them to amdgpu_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com
drm/amd/pm: do not expose those APIs used internally only in amdgpu_dpm.c
Move them to amdgpu_dpm.c instead.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
13f5dbd6 |
| 21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose power implementation details to display
Display is another client of our power APIs. It's not proper to spike into power implementation details there.
Signed-off-by: Evan
drm/amd/pm: do not expose power implementation details to display
Display is another client of our power APIs. It's not proper to spike into power implementation details there.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
79c65f3f |
| 21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose power implementation details to amdgpu_pm.c
amdgpu_pm.c holds all the user sysfs/hwmon interfaces. It's another client of our power APIs. It's not proper to spike into powe
drm/amd/pm: do not expose power implementation details to amdgpu_pm.c
amdgpu_pm.c holds all the user sysfs/hwmon interfaces. It's another client of our power APIs. It's not proper to spike into power implementation details there.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc143d8b |
| 21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose implementation details to other blocks out of power
Those implementation details(whether swsmu supported, some ppt_funcs supported, accessing internal statistics ...)should
drm/amd/pm: do not expose implementation details to other blocks out of power
Those implementation details(whether swsmu supported, some ppt_funcs supported, accessing internal statistics ...)should be kept internally. It's not a good practice and even error prone to expose implementation details.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.1 |
|
#
6c08e0ef |
| 05-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid duplicate powergate/ungate setting
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may
drm/amd/pm: avoid duplicate powergate/ungate setting
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues.
Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ee27ee2 |
| 05-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid duplicate powergate/ungate setting
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may
drm/amd/pm: avoid duplicate powergate/ungate setting
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues.
Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Fixes: bf756fb833cb ("drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend") Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
b536cf3e |
| 25-Mar-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: don't use BACO for reset in S3
commit ebc002e3ee78409c42156e62e4e27ad1d09c5a75 upstream.
Seems to cause a reboots or hangs on some systems.
Bug: https://gitlab.freedesktop.org/drm/amd/
drm/amdgpu: don't use BACO for reset in S3
commit ebc002e3ee78409c42156e62e4e27ad1d09c5a75 upstream.
Seems to cause a reboots or hangs on some systems.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1924 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1953 Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
21d727a3 |
| 05-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid duplicate powergate/ungate setting
commit 6ee27ee27ba8b2e725886951ba2d2d87f113bece upstream.
Just bail out if the target IP block is already in the desired powergate/ungate state.
drm/amd/pm: avoid duplicate powergate/ungate setting
commit 6ee27ee27ba8b2e725886951ba2d2d87f113bece upstream.
Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues.
Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Fixes: bf756fb833cb ("drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend") Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26 |
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#
d2b0b483 |
| 25-Mar-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: unify the interface for power gating
No need to have special handling for swSMU supported ASICs.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com
drm/amd/pm: unify the interface for power gating
No need to have special handling for swSMU supported ASICs.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2e4b2f7b |
| 24-Mar-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: unify the interface for loading SMU microcode
No need to have special handling for swSMU supported ASICs.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.laza
drm/amd/pm: unify the interface for loading SMU microcode
No need to have special handling for swSMU supported ASICs.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9113a0fb |
| 23-Mar-2021 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm: fix gpu reset failure by MP1 state setting
Instead of blocking varied unsupported MP1 state in upper level, defer and skip such MP1 state handling in specific ASIC.
Signed-off-by: Lijo
drm/amd/pm: fix gpu reset failure by MP1 state setting
Instead of blocking varied unsupported MP1 state in upper level, defer and skip such MP1 state handling in specific ASIC.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c93ebea0 |
| 22-Mar-2021 |
Guchun Chen <guchun.chen@amd.com> |
drm/amd/pm: fix MP1 state setting failure in s3 test
Skip PP_MP1_STATE_NONE in MP1 state setting, otherwise, it will break S3 sequence.
[ 50.188269] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]]
drm/amd/pm: fix MP1 state setting failure in s3 test
Skip PP_MP1_STATE_NONE in MP1 state setting, otherwise, it will break S3 sequence.
[ 50.188269] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* SMC failed to set mp1 state 0, -22 [ 50.969901] amdgpu 0000:03:00.0: amdgpu: SMU is resuming... [ 50.970024] sd 0:0:0:0: [sda] Starting disk [ 50.979723] serial 00:02: activated [ 51.353644] ata4: SATA link down (SStatus 4 SControl 300) [ 51.353669] ata3: SATA link down (SStatus 4 SControl 300) [ 51.353747] ata6: SATA link down (SStatus 4 SControl 300) [ 51.357694] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300) [ 51.357711] ata5: SATA link down (SStatus 4 SControl 300) [ 51.357729] ata2: SATA link down (SStatus 4 SControl 300) [ 51.358005] ata1.00: supports DRM functions and may not be fully accessible [ 51.360491] ata1.00: supports DRM functions and may not be fully accessible [ 51.362573] ata1.00: configured for UDMA/133 [ 51.362610] ahci 0000:00:17.0: port does not support device sleep [ 51.362946] ata1.00: Enabling discard_zeroes_data [ 52.566438] amdgpu 0000:03:00.0: amdgpu: Msg issuing pre-check failed and SMU may be not in the right state! [ 54.126316] amdgpu 0000:03:00.0: amdgpu: Msg issuing pre-check failed and SMU may be not in the right state! [ 54.126317] amdgpu 0000:03:00.0: amdgpu: Failed to SetDriverDramAddr! [ 54.126318] amdgpu 0000:03:00.0: amdgpu: Failed to setup smc hw! [ 54.126319] [drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <smu> failed -62 [ 54.126398] amdgpu 0000:03:00.0: amdgpu: amdgpu_device_ip_resume failed (-62). [ 54.126399] PM: dpm_run_callback(): pci_pm_resume+0x0/0x90 returns -62 [ 54.126403] PM: Device 0000:03:00.0 failed to resume async: error -62
Fixes: 1689fca0d62aa7 ("drm/amd/pm: fix Navi1x runtime resume failure V2") Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10 |
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#
bc7d6c12 |
| 03-Dec-2020 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use API
v2: fix errors and warnings flagged by checkpatch v3: Context mismatch with revision v3 to patch 0003
New Functions smu_get_m
amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use API
v2: fix errors and warnings flagged by checkpatch v3: Context mismatch with revision v3 to patch 0003
New Functions smu_get_mclk - implementation of the Powerplay API function get_mclk smu_get_sclk - implementation of the Powerplay API function get_sclk smu_handle_dpm_task - implementation of the Powerplay API function dispatch_tasks
Modified Functions smu_dpm_set_power_gate - - modifed arg0 to match Powerplay API set_powergating_by_smu
Other Changes removed special smu handling in dpm functions and called through Powerplay API call to smu_dpm_set_power_gate via Powerplay API now locks mutex for UVD and VCE
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9ab5001a |
| 03-Nov-2020 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Powerplay API for smu , changed 5 dpm powergating & sensor functions to use API
v2: add comment to highlight assignment that changes uint32_t value to int fix errors flagged by checkp
amdgpu/pm: Powerplay API for smu , changed 5 dpm powergating & sensor functions to use API
v2: add comment to highlight assignment that changes uint32_t value to int fix errors flagged by checkpatch.pl
New Functions smu_get_baco_capability() - Implement Powerplay API get_asic_baco_capability smu_baco_set_state() - Implement Powerplay API set_asic_baco_state
Modified Functions smu_read_sensor() - modifed signature to match Powerplay API read_sensor
Other Changes added 3 above smu Powerplay functions to swsmu_dpm_funcs removed special smu handling in 5 dpm functions and called through Powerplay API
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bab0f602 |
| 29-Oct-2020 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use API
Modified Functions smu_set_xgmi_pstate() - modifed arg0 to match Powerplay API set_xgmi_pstate smu_mode2_reset()
amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use API
Modified Functions smu_set_xgmi_pstate() - modifed arg0 to match Powerplay API set_xgmi_pstate smu_mode2_reset() - modifed arg0 to match Powerplay API asic_reset_mode_2 smu_switch_power_profile() - modifed arg0 to match Powerplay API switch_power_profile smu_set_mp1_state() - modifed arg0 to match Powerplay API set_mp1_state smu_set_df_cstate() - modifed arg0 to match Powerplay API set_df_cstate smu_enable_mgpu_fan_boost() - modifed arg0 to match Powerplay API enable_mgpu_fan_boost
Other Changes added above smu reset Powerplay functions to swsmu_dpm_funcs removed special smu handling of above functions and called through Powerplay API
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7cf7a392 |
| 24-Nov-2020 |
Jingwen Chen <Jingwen.Chen2@amd.com> |
drm/amdgpu: skip power profile switch in sriov
power profile switch in vcn need to send SetWorkLoad msg to smu, which is not supported in sriov.
Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
drm/amdgpu: skip power profile switch in sriov
power profile switch in vcn need to send SetWorkLoad msg to smu, which is not supported in sriov.
Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by: Jiange Zhao <Jiange.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61 |
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#
4a580877 |
| 24-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Get DRM dev from adev by inline-f
Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer.
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Re
drm/amdgpu: Get DRM dev from adev by inline-f
Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer.
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.8.3, v5.4.60, v5.8.2, v5.4.59 |
|
#
2a25ba97 |
| 12-Aug-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop log message in amdgpu_dpm_baco_reset()
The caller does this now for all reset types. This is now a duplicate call.
Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Ale
drm/amdgpu: drop log message in amdgpu_dpm_baco_reset()
The caller does this now for all reset types. This is now a duplicate call.
Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e098bc96 |
| 13-Aug-2020 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize the power related source code layout
The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on d
drm/amd/pm: optimize the power related source code layout
The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on different ASICs. Hopefully all these can make power part more friendly to play with.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61 |
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#
4a580877 |
| 24-Aug-2020 |
Luben Tuikov <luben.tuikov@amd.com> |
drm/amdgpu: Get DRM dev from adev by inline-f Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer. Signed-off-by: Luben Tuikov <lube
drm/amdgpu: Get DRM dev from adev by inline-f Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.8.3, v5.4.60, v5.8.2, v5.4.59 |
|
#
2a25ba97 |
| 12-Aug-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: drop log message in amdgpu_dpm_baco_reset() The caller does this now for all reset types. This is now a duplicate call. Reviewed-by: Kevin Wang <kevin1.wang@amd.com
drm/amdgpu: drop log message in amdgpu_dpm_baco_reset() The caller does this now for all reset types. This is now a duplicate call. Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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