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b3c340fa |
| 19-Aug-2017 |
Yue Hin Lau <Yuehin.Lau@amd.com> |
drm/amd/display: move cm registers from ipp to dpp_cm Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wen
drm/amd/display: move cm registers from ipp to dpp_cm Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d66cf5f5 |
| 03-Aug-2017 |
Anthony Koo <Anthony.Koo@amd.com> |
drm/amd/display: implement DXGI Gamma Ramps Support for gamma correction ramp in Floating Point format Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <
drm/amd/display: implement DXGI Gamma Ramps Support for gamma correction ramp in Floating Point format Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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51666631 |
| 21-Jul-2017 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: support for updated register headers on DCN Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
drm/amd/display: support for updated register headers on DCN Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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fc095690 |
| 12-Jul-2017 |
Tony Cheng <tony.cheng@amd.com> |
drm/amd/display: register programming consolidation remove redundant DPP_CLOCK_ENABLE in ipp. clock programmed by HWSS Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by
drm/amd/display: register programming consolidation remove redundant DPP_CLOCK_ENABLE in ipp. clock programmed by HWSS Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a3ac9dad |
| 06-Jul-2017 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: dal1.1 ipp prog update Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.We
drm/amd/display: dal1.1 ipp prog update Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v4.12 |
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35ce37d6 |
| 28-Jun-2017 |
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> |
drm/amd/display: Enable ipp compilation Update relevant registers Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyush
drm/amd/display: Enable ipp compilation Update relevant registers Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v4.10.17 |
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5aff86c1 |
| 16-May-2017 |
Leo (Sunpeng) Li <sunpeng.li@amd.com> |
drm/amd/display: Implement input gamma LUT 1. Implemented dcn10_ipp_program_input_lut(), following the existing interface. 2. Added missing registers as needed 3. Change to RE
drm/amd/display: Implement input gamma LUT 1. Implemented dcn10_ipp_program_input_lut(), following the existing interface. 2. Added missing registers as needed 3. Change to REG_GET for *ram_select() funcs. 4. Removed gamma table init from DiagsDM::make_surface() for resolving CRC errors. Reason: Legacy LUT will be deprecated soon for Raven in favor of degamma/regamma. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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d3ec0562 |
| 16-May-2017 |
Leo (Sunpeng) Li <sunpeng.li@amd.com> |
drm/amd/display: Fix dcn10 cursor set position hang Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes() with invalid (0-value) attributes can cause the ASIC to hang.
drm/amd/display: Fix dcn10 cursor set position hang Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes() with invalid (0-value) attributes can cause the ASIC to hang. This fix checks that address.quadpart is non-zero within set_position before calling set_attributes. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v4.10.16 |
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70ccab60 |
| 08-May-2017 |
Harry Wentland <harry.wentland@amd.com> |
drm/amdgpu/display: Add core dc support for DCN Core display support for DCN. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deuch
drm/amdgpu/display: Add core dc support for DCN Core display support for DCN. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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