clk: sunxi-ng: add support for PRCM CCUs

SoCs after A31 has a clock controller module in the PRCM part.

Support the clock controller module on H3/5 and A64 now.

Signed-off-

clk: sunxi-ng: add support for PRCM CCUs

SoCs after A31 has a clock controller module in the PRCM part.

Support the clock controller module on H3/5 and A64 now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs

Tighten the depends on the various AllWinn SoCs so we don't
inadvertantly get clock drivers when we're not wanting them
lik

clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs

Tighten the depends on the various AllWinn SoCs so we don't
inadvertantly get clock drivers when we're not wanting them
like 32 bit SoC clocks for 64 bit configs. Ensure there's
still test coverage though.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver

Allwinner H5 is a SoC that features a design which keeps the peripheral
compatible with H3, so that it have also a CCU like

clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver

Allwinner H5 is a SoC that features a design which keeps the peripheral
compatible with H3, so that it have also a CCU like the one on H3 --
only one bus gate/reset is added, and the mmc sample/output phases are
removed because of MMC controller update.

Add its support in our existing H3 CCU driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi: ccu-sun5i needs nkmp

A randconfig build ran into this rare link error:

drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.1+0x4): undefined reference to `ccu_nkm

clk: sunxi: ccu-sun5i needs nkmp

A randconfig build ran into this rare link error:

drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.1+0x4): undefined reference to `ccu_nkmp_ops'
drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.7+0x4): undefined reference to `ccu_nkmp_ops'

This adds the missing 'select'.

Fixes: 5e73761786d6 ("clk: sunxi-ng: Add sun5i CCU driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i

We get a link error when CCU_MULT is not set with the
newly added driver:

drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_liter

clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i

We get a link error when CCU_MULT is not set with the
newly added driver:

drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.17+0x4): undefined reference to `ccu_mult_ops'
drivers/clk/sunxi-ng/ccu-sun5i.o:(.data.__compound_literal.5+0x4): undefined reference to `ccu_mult_ops'

Fixes: 5e73761786d6 ("clk: sunxi-ng: Add sun5i CCU driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

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clk: sunxi-ng: Add A80 CCU

Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel fr

clk: sunxi-ng: Add A80 CCU

Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel from Allwinner. These include controls for the I2S,
SPDIF, SATA, and eDP blocks.

Note that on the A80, some subsystems have separate clock controllers
downstream of the main clock unit. These include the MMC, USB, and
display engine subsystems.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: Add sun5i CCU driver

The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.

However, they're not packaged

clk: sunxi-ng: Add sun5i CCU driver

The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.

However, they're not packaged in the same way, and therefore not all the
controllers are actually available on all these SoCs.

Introduce a clock controller driver for all these SoCs with different
compatibles to take that into account.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: add support for V3s CCU

V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.

clk: sunxi-ng: add support for V3s CCU

V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.

Add such a new driver for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: Add A64 clocks

Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime

clk: sunxi-ng: Add A64 clocks

Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: Remove the use of rational computations

While the rational library works great, it doesn't really allow us to add
more constraints, like the minimum.

Remove that

clk: sunxi-ng: Remove the use of rational computations

While the rational library works great, it doesn't really allow us to add
more constraints, like the minimum.

Remove that in order to be able to deal with the constraints we'll need.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

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clk: sunxi-ng: Add hardware dependency

The sunxi-ng clock driver is useless for other architectures.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Stephen Boyd <sboyd

clk: sunxi-ng: Add hardware dependency

The sunxi-ng clock driver is useless for other architectures.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: Add A23 CCU

Add support for the clock unit found in the A23. Due to the similarities
with the A33, it also shares its clock IDs to allow sharing the DTSI.

Signed-

clk: sunxi-ng: Add A23 CCU

Add support for the clock unit found in the A23. Due to the similarities
with the A33, it also shares its clock IDs to allow sharing the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

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clk: sunxi-ng: Add A33 CCU support

This commit introduces the clocks found in the Allwinner A33 CCU.

Since this SoC is very similar to the A23, and we share a significant share

clk: sunxi-ng: Add A33 CCU support

This commit introduces the clocks found in the Allwinner A33 CCU.

Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

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clk: sunxi-ng: Add N-class clocks support

Add support for the class with a single factor, N, being a multiplier.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

clk: sunxi-ng: Add N-class clocks support

Add support for the class with a single factor, N, being a multiplier.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

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clk: sunxi-ng: Add A31/A31s clocks

Add a new style driver for the clock control unit in Allwinner A31/A31s.

A few clocks are still missing:

- MIPI PLL's HDMI mode suppo

clk: sunxi-ng: Add A31/A31s clocks

Add a new style driver for the clock control unit in Allwinner A31/A31s.

A few clocks are still missing:

- MIPI PLL's HDMI mode support
- EMAC clock

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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clk: sunxi-ng: h3: Fix Kconfig symbol typo

The Kconfig symbol for the sun8i SoC family was mistyped. Fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Si

clk: sunxi-ng: h3: Fix Kconfig symbol typo

The Kconfig symbol for the sun8i SoC family was mistyped. Fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160711203448.18062-2-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add H3 clocks

Add the list of clocks and resets found in the H3 CCU.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turque

clk: sunxi-ng: Add H3 clocks

Add the list of clocks and resets found in the H3 CCU.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-14-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add N-K-M-P factor clock

Introduce support for clocks that use a combination of two linear
multipliers (N and K factors), one linear divider (M) and one power of two
d

clk: sunxi-ng: Add N-K-M-P factor clock

Introduce support for clocks that use a combination of two linear
multipliers (N and K factors), one linear divider (M) and one power of two
divider (P).

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-13-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add N-K-M Factor clock

Introduce support for clocks that multiply and divide using two linear
multipliers and one linear divider.

Signed-off-by: Maxime Ripard <ma

clk: sunxi-ng: Add N-K-M Factor clock

Introduce support for clocks that multiply and divide using two linear
multipliers and one linear divider.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-12-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add N-M-factor clock support

Introduce support for clocks that multiply and divide using linear factors.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.co

clk: sunxi-ng: Add N-M-factor clock support

Introduce support for clocks that multiply and divide using linear factors.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-11-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add N-K-factor clock support

Introduce support for clocks that use a combination of two linear
multipliers.

Signed-off-by: Maxime Ripard <maxime.ripard@free-elect

clk: sunxi-ng: Add N-K-factor clock support

Introduce support for clocks that use a combination of two linear
multipliers.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-10-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add M-P factor clock support

Introduce support for the clocks that combine a linear divider and a
power-of-two based one.

Signed-off-by: Maxime Ripard <maxime.rip

clk: sunxi-ng: Add M-P factor clock support

Introduce support for the clocks that combine a linear divider and a
power-of-two based one.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add divider

Add support for the various dividers (linear, table or pow-of-two based)
found in the CCU.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.

clk: sunxi-ng: Add divider

Add support for the various dividers (linear, table or pow-of-two based)
found in the CCU.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-8-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add phase clock support

Add support for the clocks in the CCU that introduce a phase shift from
their parent clock.

Signed-off-by: Maxime Ripard <maxime.ripard@fr

clk: sunxi-ng: Add phase clock support

Add support for the clocks in the CCU that introduce a phase shift from
their parent clock.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-7-maxime.ripard@free-electrons.com

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clk: sunxi-ng: Add mux clock support

Some clocks in the Allwinner SoCs clocks unit are just muxes.

However, those muxes might also be found in some other complicated clocks
that

clk: sunxi-ng: Add mux clock support

Some clocks in the Allwinner SoCs clocks unit are just muxes.

However, those muxes might also be found in some other complicated clocks
that would benefit from the code in there to deal with "advanced" features,
like pre-dividers.

Introduce a set of helpers to reduce the code duplication in such cases.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-6-maxime.ripard@free-electrons.com

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