Revision tags: v3.6-rc3, v3.6-rc2 |
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30404aec |
| 16-Aug-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: adds support for gptu timers Lantiq socs have a General Purpose Timer Unit (GPTU). This driver allows us to initialize the timers. The voice firmware needs these timers as
MIPS: lantiq: adds support for gptu timers Lantiq socs have a General Purpose Timer Unit (GPTU). This driver allows us to initialize the timers. The voice firmware needs these timers as a reference. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4236/
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Revision tags: v3.6-rc1, v3.5, v3.5-rc7, v3.5-rc6, v3.5-rc5, v3.5-rc4, v3.5-rc3, v3.5-rc2, v3.5-rc1, v3.4, v3.4-rc7 |
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5238f7bc |
| 11-May-2012 |
John Crispin <blogic@openwrt.org> |
GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 p
GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 patches will convert the drivers to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3838/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v3.4-rc6, v3.4-rc5, v3.4-rc4 |
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287e3f3f |
| 17-Apr-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: implement support for clkdev api This patch unifies all clock generation and gating code into one file. All drivers will now be able to request their clocks via their devic
MIPS: lantiq: implement support for clkdev api This patch unifies all clock generation and gating code into one file. All drivers will now be able to request their clocks via their device. This patch also adds support for the clockout feature, which allows clock generation on external pins. Support for COMMON_CLK will be provided in the next series. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3804/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v3.4-rc3 |
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cd93b489 |
| 13-Apr-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: drop mips_machine support Before we are able to add OF support, we really want to drop all the bloat needed to register all the platform devices. Signed-off-by: Jo
MIPS: lantiq: drop mips_machine support Before we are able to add OF support, we really want to drop all the bloat needed to register all the platform devices. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3800/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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215ed200 |
| 30-Apr-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: add xway soc ids Add the soc ids for additional xway socs. The patch also merges the amazon_se code with the other socs. Signed-off-by: John Crispin <blogic@openwr
MIPS: lantiq: add xway soc ids Add the soc ids for additional xway socs. The patch also merges the amazon_se code with the other socs. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v3.4-rc2, v3.4-rc1, v3.3, v3.3-rc7, v3.3-rc6, v3.3-rc5, v3.3-rc4, v3.3-rc3, v3.3-rc2, v3.3-rc1, v3.2, v3.2-rc7, v3.2-rc6, v3.2-rc5, v3.2-rc4, v3.2-rc3, v3.2-rc2, v3.2-rc1, v3.1, v3.1-rc10, v3.1-rc9, v3.1-rc8, v3.1-rc7, v3.1-rc6, v3.1-rc5, v3.1-rc4, v3.1-rc3, v3.1-rc2, v3.1-rc1, v3.0, v3.0-rc7, v3.0-rc6, v3.0-rc5, v3.0-rc4, v3.0-rc3, v3.0-rc2, v3.0-rc1, v2.6.39, v2.6.39-rc7 |
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dfec1a82 |
| 05-May-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add DMA support This patch adds support for the DMA engine found inside the XWAY family of SoCs. The engine has 5 ports and 20 channels. Signed-off-by: John Crispi
MIPS: Lantiq: Add DMA support This patch adds support for the DMA engine found inside the XWAY family of SoCs. The engine has 5 ports and 20 channels. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2355/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v2.6.39-rc6, v2.6.39-rc5, v2.6.39-rc4, v2.6.39-rc3, v2.6.39-rc2 |
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935c500c |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add more gpio drivers The XWAY family allows to extend the number of gpios by using shift registers or latches. This patch adds the 2 drivers needed for this. The exten
MIPS: Lantiq: Add more gpio drivers The XWAY family allows to extend the number of gpios by using shift registers or latches. This patch adds the 2 drivers needed for this. The extended gpios are output only. [ralf@linux-mips.org: Fixed ltq_stp_probe section() attributes.] Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2258/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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973c32eb |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add machtypes for lantiq eval kits This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation boards Signed-off-by: John Crispin <blogic@openwrt.
MIPS: Lantiq: Add machtypes for lantiq eval kits This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation boards Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2255/ Patchwork: https://patchwork.linux-mips.org/patch/2361/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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a053ac17 |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add mips_machine support This patch adds support for Gabor's mips_machine patch. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralp
MIPS: Lantiq: Add mips_machine support This patch adds support for Gabor's mips_machine patch. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2251/ Patchwork: https://patchwork.linux-mips.org/patch/2358/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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24aff71f |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add platform device support This patch adds the wrappers for registering our platform devices. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralp
MIPS: Lantiq: Add platform device support This patch adds the wrappers for registering our platform devices. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2254/ Patchwork: https://patchwork.linux-mips.org/patch/2360/ Patchwork: https://patchwork.linux-mips.org/patch/2359/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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8ec6d935 |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: add SoC specific code for XWAY family Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) *
MIPS: Lantiq: add SoC specific code for XWAY family Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) * Amazon SE (PSB5061) The Amazon SE is a lightweight SoC and has no PCI as well as a different clock. We split the code out into seperate files to handle this. The GPIO pins on the SoCs are multi function and there are several bits we can use to configure the pins. To be as compatible as possible to GPIOLIB we add a function int lq_gpio_request(unsigned int pin, unsigned int alt0, unsigned int alt1, unsigned int dir, const char *name); which lets you configure the 2 "alternate function" bits. This way drivers like PCI can make use of GPIOLIB without a cubersome wrapper. The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was taken from a 2.4.20 source tree and was never really changed by me since then. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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