Revision tags: v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5, v3.16-rc4, v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15, v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8, v3.14-rc7, v3.14-rc6, v3.14-rc5, v3.14-rc4, v3.14-rc3, v3.14-rc2, v3.14-rc1, v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5, v3.13-rc4, v3.13-rc3, v3.13-rc2, v3.13-rc1, v3.12, v3.12-rc7, v3.12-rc6, v3.12-rc5, v3.12-rc4, v3.12-rc3, v3.12-rc2, v3.12-rc1, v3.11, v3.11-rc7, v3.11-rc6, v3.11-rc5, v3.11-rc4, v3.11-rc3, v3.11-rc2, v3.11-rc1, v3.10, v3.10-rc7, v3.10-rc6, v3.10-rc5, v3.10-rc4, v3.10-rc3, v3.10-rc2, v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7, v3.9-rc6, v3.9-rc5, v3.9-rc4, v3.9-rc3, v3.9-rc2, v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5, v3.7-rc4, v3.7-rc3 |
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0224cde2 |
| 22-Oct-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: adds GPHY firmware loader The internal GPHYs need a firmware blob to function properly. This patch adds the code needed to request the blob and load it to the PHY.
MIPS: lantiq: adds GPHY firmware loader The internal GPHYs need a firmware blob to function properly. This patch adds the code needed to request the blob and load it to the PHY. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4523
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Revision tags: v3.7-rc2, v3.7-rc1, v3.6, v3.6-rc7, v3.6-rc6, v3.6-rc5, v3.6-rc4, v3.6-rc3, v3.6-rc2, v3.6-rc1, v3.5, v3.5-rc7, v3.5-rc6, v3.5-rc5, v3.5-rc4, v3.5-rc3, v3.5-rc2, v3.5-rc1, v3.4 |
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e316cb2b |
| 19-May-2012 |
John Crispin <blogic@openwrt.org> |
OF: pinctrl: MIPS: lantiq: adds support for FALCON SoC Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks of up to 32 pins. Signed-off-by: John Crispin
OF: pinctrl: MIPS: lantiq: adds support for FALCON SoC Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks of up to 32 pins. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
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3f8c50c9 |
| 28-Aug-2012 |
John Crispin <blogic@openwrt.org> |
OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf
OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf and gpio mixed up in the same register range. As the gpio_chip handling is only a few lines, the driver also implements the gpio functionality. This obseletes the old gpio driver that was located in the arch/ folder. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
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Revision tags: v3.4-rc7, v3.4-rc6, v3.4-rc5, v3.4-rc4 |
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d41ced01 |
| 19-Apr-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: implement support for FALCON soc Adds support for the FALCON SoC. This SoC is from the FTTH/GPON SoC family. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
MIPS: lantiq: implement support for FALCON soc Adds support for the FALCON SoC. This SoC is from the FTTH/GPON SoC family. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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57c8cb8f |
| 11-May-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: pci: convert lantiq driver to OF Implement support for OF inside the lantiq PCI driver. The patch also splits pcibios_plat_dev_init and pcibios_map_irq out into their own file to a
MIPS: pci: convert lantiq driver to OF Implement support for OF inside the lantiq PCI driver. The patch also splits pcibios_plat_dev_init and pcibios_map_irq out into their own file to accomodate coexistance with the upcoming pcie driver. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3806/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v3.4-rc3 |
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a0392222 |
| 13-Apr-2012 |
John Crispin <blogic@openwrt.org> |
OF: MIPS: lantiq: implement OF support Activate USE_OF, add a sample DTS file and convert the core soc code to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mip
OF: MIPS: lantiq: implement OF support Activate USE_OF, add a sample DTS file and convert the core soc code to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3803/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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cd93b489 |
| 13-Apr-2012 |
John Crispin <blogic@openwrt.org> |
MIPS: lantiq: drop mips_machine support Before we are able to add OF support, we really want to drop all the bloat needed to register all the platform devices. Signed-off-by: Jo
MIPS: lantiq: drop mips_machine support Before we are able to add OF support, we really want to drop all the bloat needed to register all the platform devices. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3800/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Revision tags: v3.4-rc2, v3.4-rc1, v3.3, v3.3-rc7, v3.3-rc6, v3.3-rc5, v3.3-rc4, v3.3-rc3, v3.3-rc2, v3.3-rc1, v3.2, v3.2-rc7, v3.2-rc6, v3.2-rc5, v3.2-rc4, v3.2-rc3, v3.2-rc2, v3.2-rc1, v3.1, v3.1-rc10, v3.1-rc9, v3.1-rc8, v3.1-rc7, v3.1-rc6, v3.1-rc5, v3.1-rc4, v3.1-rc3, v3.1-rc2, v3.1-rc1, v3.0, v3.0-rc7, v3.0-rc6, v3.0-rc5, v3.0-rc4, v3.0-rc3, v3.0-rc2, v3.0-rc1, v2.6.39, v2.6.39-rc7, v2.6.39-rc6, v2.6.39-rc5, v2.6.39-rc4, v2.6.39-rc3, v2.6.39-rc2 |
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973c32eb |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: Add machtypes for lantiq eval kits This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation boards Signed-off-by: John Crispin <blogic@openwrt.
MIPS: Lantiq: Add machtypes for lantiq eval kits This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation boards Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2255/ Patchwork: https://patchwork.linux-mips.org/patch/2361/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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8ec6d935 |
| 30-Mar-2011 |
John Crispin <blogic@openwrt.org> |
MIPS: Lantiq: add SoC specific code for XWAY family Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) *
MIPS: Lantiq: add SoC specific code for XWAY family Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) * Amazon SE (PSB5061) The Amazon SE is a lightweight SoC and has no PCI as well as a different clock. We split the code out into seperate files to handle this. The GPIO pins on the SoCs are multi function and there are several bits we can use to configure the pins. To be as compatible as possible to GPIOLIB we add a function int lq_gpio_request(unsigned int pin, unsigned int alt0, unsigned int alt1, unsigned int dir, const char *name); which lets you configure the 2 "alternate function" bits. This way drivers like PCI can make use of GPIOLIB without a cubersome wrapper. The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was taken from a 2.4.20 source tree and was never really changed by me since then. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2249/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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