#
c9206b42 |
| 25-Mar-2019 |
Guillaume La Roque <glaroque@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add regulators
Add system regulators for the X96 Max Set-Top-Box.
Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled)
Signed-off-by: Guillaume
arm64: dts: meson-g12a-x96-max: add regulators
Add system regulators for the X96 Max Set-Top-Box.
Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled)
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.0.4, v5.0.3 |
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#
0b7aed33 |
| 18-Mar-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add uart_AO pinctrl
Add pinctrl on the always-enabled debug UART AO.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin
arm64: dts: meson-g12a-x96-max: add uart_AO pinctrl
Add pinctrl on the always-enabled debug UART AO.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11 |
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#
d3aa4ce8 |
| 18-Dec-2018 |
Kevin Hilman <khilman@baylibre.com> |
arm64: dts: meson: add g12a x96 max board
Add the G12a (S905X2) based X96 Max board[1].
There is no branding for the manufacturer anywhere on the product, so it took some digging[2] to find the man
arm64: dts: meson: add g12a x96 max board
Add the G12a (S905X2) based X96 Max board[1].
There is no branding for the manufacturer anywhere on the product, so it took some digging[2] to find the manufacturer. But since there's nothing about the maker on the product I've left it out of the DT name because 1) nobody will know that name and 2) keeps the DT filename shorter.
[1] https://www.cnx-software.com/2018/09/25/x96-max-amlogic-s905x2-tv-box/ [2] https://fccid.io/2AI6D-X96MAX
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
cb7fadab |
| 07-Dec-2020 |
Stefan Agner <stefan@agner.ch> |
arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements [ Upstream commit 3d07c3b3a886fefd583c1b485b5e4e3c4e2da493 ] According to the datasheet (Rev. 1.9) the RTL8211
arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements [ Upstream commit 3d07c3b3a886fefd583c1b485b5e4e3c4e2da493 ] According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes: ed5e8f689154 ("arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/12506964ca5d5f936579a280ad0a7e7f9a0a2d4c.1607363522.git.stefan@agner.ch Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53, v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26 |
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#
4d2cb376 |
| 13-Mar-2020 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order to enable the eMMC and the SPI NOR interface, we
arm64: dts: meson-g12: split emmc pins to select 4 or 8 bus width The Khadas VIM3 shares the eMMC pins 4 to 7 with the SPI NOR, in order to enable the eMMC and the SPI NOR interface, we need to omit the 4 last pins from the eMMC pinctrl. As it was done for the Khadas VIM2, split the eMMC pinctrls in ctrl, data and ds pins with either 4bits data or 8bits data, and update the current board accordingly. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200313090713.15147-2-narmstrong@baylibre.com
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Revision tags: v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12 |
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#
9a9ffc69 |
| 29-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add keep-power-in-suspend property in SDIO node The WiFi firmware requires that the power is kept enabled while in suspend mode. Add the keep-power-in-sus
arm64: dts: meson-g12a-x96-max: add keep-power-in-suspend property in SDIO node The WiFi firmware requires that the power is kept enabled while in suspend mode. Add the keep-power-in-suspend property in the SDIO node to specify that the power must be kept when entering in a system wide suspend state. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.11, v5.2.10 |
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#
3e14618b |
| 24-Aug-2019 |
Christian Hewitt <christianshewitt@gmail.com> |
arm64: dts: meson-g12a-x96-max: add rc-x96max keymap add the rc-x96max keymap to the ir node Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hi
arm64: dts: meson-g12a-x96-max: add rc-x96max keymap add the rc-x96max keymap to the ir node Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
b167b473 |
| 23-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: fix compatible This fixes the following DT schemas check errors: meson-g12a-x96-max.dt.yaml: /: compatible: ['amediatech,x96-max', 'amlogic,u200', 'amlogi
arm64: dts: meson-g12a-x96-max: fix compatible This fixes the following DT schemas check errors: meson-g12a-x96-max.dt.yaml: /: compatible: ['amediatech,x96-max', 'amlogic,u200', 'amlogic,g12a'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5 |
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#
e9bc0765 |
| 29-Jul-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a: enable DVFS on G12A boards Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board by setting the clock, OPP and supply for each CPU cores.
arm64: dts: meson-g12a: enable DVFS on G12A boards Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board by setting the clock, OPP and supply for each CPU cores. The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM output clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11 |
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#
50b617a6 |
| 15-Jun-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line X96 Max has the PHY reset and interrupt lines are identical to the Odroid-N2: - GPIOZ_14 is the interrupt on X96
arm64: dts: meson: g12a: x96-max: add the Ethernet PHY interrupt line X96 Max has the PHY reset and interrupt lines are identical to the Odroid-N2: - GPIOZ_14 is the interrupt on X96 Max - GPIOZ_15 is the reset line on X96 Max Add GPIOZ_14 as PHY interrupt line on the X96 Max so we don't have to poll for the PHY status. Suggested-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
ed5e8f68 |
| 15-Jun-2019 |
Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line The Odroid-N2 schematics show that the following pins are used for the reset and interrupt lines: - GPIOZ_14 is the
arm64: dts: meson: g12a: x96-max: fix the Ethernet PHY reset line The Odroid-N2 schematics show that the following pins are used for the reset and interrupt lines: - GPIOZ_14 is the PHY interrupt line - GPIOZ_15 is the PHY reset line The GPIOZ_14 and GPIOZ_15 pins are special. The datasheet describes that they are "3.3V input tolerant open drain (OD) output pins". This means the GPIO controller can drive the output LOW to reset the PHY. To release the reset it can only switch the pin to input mode. The output cannot be driven HIGH for these pins. This requires configuring the reset line as GPIO_OPEN_DRAIN because otherwise the PHY will be stuck in "reset" state (because driving the pin HIGH seems to result in the same signal as driving it LOW). The reset line works together with a pull-up resistor (R143 in the Odroid-N2 schematics). The SoC can drive GPIOZ_14 LOW to assert the PHY reset. However, since the SoC can't drive the pin HIGH (to release the reset) we switch the mode to INPUT and let the pull-up resistor take care of driving the reset line HIGH. Switch to GPIOZ_15 for the PHY reset line instead of using GPIOZ_14 (which actually is the interrupt line). Move from the "snps" specific resets to the MDIO framework's reset-gpios because only the latter honors the GPIO flags. Use the GPIO flags (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN) to match with the pull-up resistor because this will: - drive the output LOW to reset the PHY (= active low) - switch the pin to INPUT mode so the pull-up will take the PHY out of reset Fixes: 51d116557b2044 ("arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support") Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.10 |
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#
cd0727aa |
| 11-Jun-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add sound card Enable the sound card on the X96 Max, enabling HDMI output using the TDM interface B, being aligned on other boards sound cards. SPDI/F
arm64: dts: meson-g12a-x96-max: add sound card Enable the sound card on the X96 Max, enabling HDMI output using the TDM interface B, being aligned on other boards sound cards. SPDI/F support is also enabled to the physical toslink port and to HDMI. The internal DAC connected to the audio jack will be added later on, when driver support is added. Tested by running: tinymix set "FRDDR_A SRC 1 EN Switch" 1 tinymix set "FRDDR_A SINK 1 SEL" "OUT 1" tinymix set "FRDDR_B SRC 1 EN Switch" 1 tinymix set "FRDDR_B SINK 1 SEL" "OUT 1" tinymix set "FRDDR_C SRC 1 EN Switch" 1 tinymix set "FRDDR_C SINK 1 SEL" "OUT 1" tinymix set "TOHDMITX I2S SRC" "I2S B" tinymix set "TOHDMITX Switch" 1 then: tinymix set "TDMOUT_B SRC SEL" "IN 0" speaker-test -Dhw:0,0 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 1" speaker-test -Dhw:0,1 -c2 then: tinymix set "TDMOUT_B SRC SEL" "IN 2" speaker-test -Dhw:0,2 -c2 testing HDMI audio output from the all 3 ASoC playback interfaces. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.9, v5.1.8 |
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#
e4998f48 |
| 07-Jun-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: bump bluetooth bus speed to 2Mbaud/s Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylib
arm64: dts: meson-g12a-x96-max: bump bluetooth bus speed to 2Mbaud/s Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
524595ec |
| 07-Jun-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add 32k clock to bluetooth node The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the sa
arm64: dts: meson-g12a-x96-max: add 32k clock to bluetooth node The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the same clock we use for the sdio pwrseq. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
b497ad38 |
| 07-Jun-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: Enable Wifi SDIO Module The X96 Max embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Reviewed-by:
arm64: dts: meson-g12a-x96-max: Enable Wifi SDIO Module The X96 Max embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
45380009 |
| 07-Jun-2019 |
Guillaume La Roque <glaroque@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add support for sdcard and emmc Add nodes to support SDCard and onboard eMMC on the X96 Max. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com
arm64: dts: meson-g12a-x96-max: add support for sdcard and emmc Add nodes to support SDCard and onboard eMMC on the X96 Max. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.7, v5.1.6 |
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#
e8e7037c |
| 27-May-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support Enable the network interface of the X96 Mac using an external Realtek RTL8211F gigabit PHY, needing the same broken-eee prope
arm64: dts: meson-g12a-x96-max: Add Gigabit Ethernet Support Enable the network interface of the X96 Mac using an external Realtek RTL8211F gigabit PHY, needing the same broken-eee properties as the previous Amlogic SoC generations. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8 |
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#
fff6e9d3 |
| 12-Apr-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: enable IR decoder Add support for the IR decoder input on the X96 Max board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
arm64: dts: meson-g12a-x96-max: enable IR decoder Add support for the IR decoder input on the X96 Max board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
b0be9616 |
| 08-Apr-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: Add support for Video Display This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the X96 Max STB. AO-CEC-B is
arm64: dts: meson-g12a-x96-max: Add support for Video Display This patch adds the HDMI, CVBS and CEC attributes and nodes to support full display on the X96 Max STB. AO-CEC-B is used by default and AO-CEC-A is disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.0.7, v5.0.6, v5.0.5 |
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#
45b72126 |
| 25-Mar-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: Enable USB Enable the USB2 and USB3 Host ports on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: M
arm64: dts: meson-g12a-x96-max: Enable USB Enable the USB2 and USB3 Host ports on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
c5c9c7cf |
| 25-Mar-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: Enable BT Module Enable the Bluetooth Module on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Mar
arm64: dts: meson-g12a-x96-max: Enable BT Module Enable the Bluetooth Module on the X96 Max Set-Top-Box. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
c9206b42 |
| 25-Mar-2019 |
Guillaume La Roque <glaroque@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add regulators Add system regulators for the X96 Max Set-Top-Box. Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled)
arm64: dts: meson-g12a-x96-max: add regulators Add system regulators for the X96 Max Set-Top-Box. Still missing * VDD_EE (0.8V - PWM controlled) * VDD_CPU (PWM controlled) Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.0.4, v5.0.3 |
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#
0b7aed33 |
| 18-Mar-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-g12a-x96-max: add uart_AO pinctrl Add pinctrl on the always-enabled debug UART AO. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin
arm64: dts: meson-g12a-x96-max: add uart_AO pinctrl Add pinctrl on the always-enabled debug UART AO. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11 |
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#
d3aa4ce8 |
| 18-Dec-2018 |
Kevin Hilman <khilman@baylibre.com> |
arm64: dts: meson: add g12a x96 max board Add the G12a (S905X2) based X96 Max board[1]. There is no branding for the manufacturer anywhere on the product, so it took some diggin
arm64: dts: meson: add g12a x96 max board Add the G12a (S905X2) based X96 Max board[1]. There is no branding for the manufacturer anywhere on the product, so it took some digging[2] to find the manufacturer. But since there's nothing about the maker on the product I've left it out of the DT name because 1) nobody will know that name and 2) keeps the DT filename shorter. [1] https://www.cnx-software.com/2018/09/25/x96-max-amlogic-s905x2-tv-box/ [2] https://fccid.io/2AI6D-X96MAX Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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