#
3e99cb21 |
| 09-Oct-2019 |
Tero Kristo <t-kristo@ti.com> |
soc: ti: add initial PRM driver with reset control support Add initial PRM (Power and Reset Management) driver for TI OMAP class SoCs. Initially this driver only supports reset control,
soc: ti: add initial PRM driver with reset control support Add initial PRM (Power and Reset Management) driver for TI OMAP class SoCs. Initially this driver only supports reset control, but can be extended to support rest of the functionality, like powerdomain control, PRCM irq support etc. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
show more ...
|
Revision tags: v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4 |
|
#
ec8f24b7 |
| 19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These file
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
show more ...
|
Revision tags: v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8, v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1 |
|
#
7f976867 |
| 31-Oct-2018 |
Russell King <rmk+kernel@armlinux.org.uk> |
ARM: Kconfig: remove useless "default n" The default for Kconfig options is always n, so there's no need to explicitly state a "n" default. Acked-by: Tony Lindgren <tony@atomide
ARM: Kconfig: remove useless "default n" The default for Kconfig options is always n, so there's no need to explicitly state a "n" default. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
show more ...
|
Revision tags: v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16 |
|
#
41d9d44d |
| 23-Feb-2018 |
Dave Gerlach <d-gerlach@ti.com> |
ARM: OMAP2+: pm33xx-core: Add platform code needed for PM Most of the PM code needed for am335x and am437x can be moved into a module under drivers but some core code must remain in mach
ARM: OMAP2+: pm33xx-core: Add platform code needed for PM Most of the PM code needed for am335x and am437x can be moved into a module under drivers but some core code must remain in mach-omap2 at the moment. This includes some internal clockdomain APIs and low-level ARM APIs which are also not exported for use by modules. Implement a few functions that handle these low-level platform operations can be passed to the pm33xx module through the use of platform data. In addition to this, to be able to share data structures between C and the sleep33xx and sleep43xx assembly code, we can automatically generate all of the C struct member offsets and sizes as macros by processing pm-asm-offsets.c into assembly code and then extracting the relevant data as is done for the generated platform asm-offsets.h files. Finally, add amx3_common_pm_init to create a dummy platform_device for pm33xx so that our soon to be introduced pm33xx module can probe on am335x and am437x platforms to enable basic suspend to mem and standby support. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
Revision tags: v4.15, v4.13.16, v4.14 |
|
#
0eecc636 |
| 10-Oct-2017 |
Tony Lindgren <tony@atomide.com> |
bus: ti-sysc: Add minimal TI sysc interconnect target driver We can handle the sysc interconnect target module in a generic way for many TI SoCs. Initially let's just enable runtime PM w
bus: ti-sysc: Add minimal TI sysc interconnect target driver We can handle the sysc interconnect target module in a generic way for many TI SoCs. Initially let's just enable runtime PM with autosuspend, and probe the children. This can already be used for idling interconnect target modules that don't have any device driver available for the child devices. For now, the "ti,hwmods" custom binding is still required. That will be eventually deprecated in later patches. And more features will be added, such as parsing for sysc capabilities so we can continue removing the legacy platform data. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: linux-kernel@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
Revision tags: v4.13.5, v4.13 |
|
#
c2818a19 |
| 10-Aug-2017 |
Kishon Vijay Abraham I <kishon@ti.com> |
ARM: OMAP2+: Select PINCTRL_TI_IODELAY for SOC_DRA7XX PINCTRL_TI_IODELAY should be enabled so that "pinctrl_dev" can be created for pinctrl entries populated with iodelay values in devic
ARM: OMAP2+: Select PINCTRL_TI_IODELAY for SOC_DRA7XX PINCTRL_TI_IODELAY should be enabled so that "pinctrl_dev" can be created for pinctrl entries populated with iodelay values in device tree data. Select PINCTRL_TI_IODELAY for SOC_DRA7XX here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
Revision tags: v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2, v4.10.1, v4.10, v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26 |
|
#
72bb40b8 |
| 19-Oct-2016 |
Dave Gerlach <d-gerlach@ti.com> |
ARM: AM43XX: Select OMAP_INTERCONNECT in Kconfig AM437x makes use of the omap_l3_noc driver so explicitly select OMAP_INTERCONNECT in the Kconfig for SOC_AM43XX to ensure it gets enabled
ARM: AM43XX: Select OMAP_INTERCONNECT in Kconfig AM437x makes use of the omap_l3_noc driver so explicitly select OMAP_INTERCONNECT in the Kconfig for SOC_AM43XX to ensure it gets enabled for AM43XX only builds. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
55d421b4 |
| 02-Sep-2016 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup Merge "drop last omap3 board files for v4.8" from Tony Lindgren:
Merge tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup Merge "drop last omap3 board files for v4.8" from Tony Lindgren: Remove the last two legacy board-*.c files for omap3 for legacy booting for v4.8 to allow making mach-omap2 device tree only for v4.9. We've had Nokia N900 and omap3 LDP board-*.c files remaining while other omap3 devices have been device tree only for quite a while now. Also N900 and LDP have had device tree based booting working for years now, but few drivers for N900 were still only working in legacy only mode until recently. With the remaining issues out of the way, we discussed on the mailing lists that we're finally OK to remove the remaining board-*.c files. For the timing of this pull request, I wanted to wait until v4.8-rc1 is out to make sure the legacy booting still works fine after the merge window before doing it. And for v4.8, let's not touch any other platform data in case we still need to revert for some reason. This makes the revert just a question of adding back the legacy board-*.c files. Then if no issues, we can remove the unused remaining platform data later on for v4.9. * tag 'omap-for-v4.8/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Drop legacy board file for LDP ARM: OMAP2+: Drop legacy board file for n900
show more ...
|
#
6f888fe3 |
| 01-Aug-2016 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "The cleanup branch keeps going down in size as we've
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "The cleanup branch keeps going down in size as we've completed a lot of the major legacy platform removals and conversions. A handful of changes this time around, some of the themes or larger sets are: - A bunch of i.MX cleanups around platform detection, init call cleanups - Misc fixes of missing/implicit includes - Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits) ARM: mps2: fix typo ARM: s3c64xx: avoid warning about 'struct device_node' bus: mvebu-mbus: make mvebu_mbus_syscore_ops static bus: mvebu-mbus: fix __iomem on register pointers ARM: tegra: Remove board_init_funcs array ARM: iop: Fix indentation ARM: imx: remove cpu_is_mx*() ARM: imx: remove last call to cpu_is_mx5* ARM: imx: rework mx27_pm_init() call ARM: imx: deconstruct mx3_idle ARM: imx: deconstruct mxc_rnga initialization ARM: imx: remove cpu_is_mx1 check ARM: i.MX: Do not explicitly call l2x0_of_init() ARM: i.MX: system.c: Tweak prefetch settings for performance ARM: i.MX: system.c: Replace magic numbers ARM: i.MX: system.c: Remove redundant errata 752271 code ARM: i.MX: system.c: Convert goto to if statement ARM: Kirkwood: fix kirkwood_pm_init() declaration/type ARM: Kirkwood: make kirkwood_disable_mbus_error_propagation() static ARM: orion5x: make orion5x_legacy_handle_irq static ...
show more ...
|
Revision tags: v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22, v4.4.21, v4.7.4, v4.7.3, v4.4.20, v4.7.2, v4.4.19, openbmc-4.4-20160819-1, v4.7.1, v4.4.18, v4.4.17, openbmc-4.4-20160804-1, v4.4.16, v4.7, openbmc-4.4-20160722-1, openbmc-20160722-1, openbmc-20160713-1, v4.4.15, v4.6.4, v4.6.3, v4.4.14 |
|
#
e92fc4f0 |
| 15-Jun-2016 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Drop legacy board file for LDP Let's drop the last two remaining omap3 legacy boot board files. Let's only use the device tree based booting known to work for these two
ARM: OMAP2+: Drop legacy board file for LDP Let's drop the last two remaining omap3 legacy boot board files. Let's only use the device tree based booting known to work for these two boards. We still have two omap3 boards booting in legacy mode in addition to device tree based booting. All the other ten or so omap2+ SoCs have been booting using device tree mode only for years now. This has allowed us to get rid of quite a bit of arch/arm/mach-omap2 related platform init code in favor of dts and driver changes. Pretty much the only remaining known users for omap3 legacy boot board files are Kevin's and Russell's boot test systems, and N900 kernel tree maintained by Pali and Ivaylo. And all of them are also supporting the device tree based booting. The legacy booting mode has been kept around mostly to verify against regressions. As there is still a slim chance of possible other uses of the mainline kernel for these boards, let's just drop the board files for v4.8, and let's not touch the related platform init code until around v4.9 time if no issues are found. This makes it trivial for us to add back the board files with a simple revert. Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
9b7141d0 |
| 15-Jun-2016 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Drop legacy board file for n900 Let's drop the last two remaining omap3 legacy boot board files. Let's only use the device tree based booting known to work for these two
ARM: OMAP2+: Drop legacy board file for n900 Let's drop the last two remaining omap3 legacy boot board files. Let's only use the device tree based booting known to work for these two boards. We still have two omap3 boards booting in legacy mode in addition to device tree based booting. All the other ten or so omap2+ SoCs have been booting using device tree mode only for years now. This has allowed us to get rid of quite a bit of arch/arm/mach-omap2 related platform init code in favor of dts and driver changes. Pretty much the only remaining known users for omap3 legacy boot board files are Kevin's and Russell's boot test systems, and N900 kernel tree maintained by Pali and Ivaylo. And all of them are also supporting the device tree based booting. The legacy booting mode has been kept around mostly to verify against regressions. As there is still a slim chance of possible other uses of the mainline kernel for these boards, let's just drop the board files for v4.8, and let's not touch the related platform init code until around v4.9 time if no issues are found. This makes it trivial for us to add back the board files with a simple revert. Acked-By: Sebastian Reichel <sre@kernel.org> Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
58935f24 |
| 19-Jun-2016 |
Olof Johansson <olof@lixom.net> |
Merge tag 'omap-for-v4.7/fixes-powedomain' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps for v4.7-rc cycle: - Fix dra7 for hardware i
Merge tag 'omap-for-v4.7/fixes-powedomain' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps for v4.7-rc cycle: - Fix dra7 for hardware issues limiting L4Per and L3init power domains to on state. Without this the devices may not work correctly after some time of use because of asymmetric aging. And related to this, let's also remove the unusable states. - Always select omap interconnect for am43x as otherwise the am43x only configurations will not boot properly. This can happen easily for any product kernels that leave out other SoCs to save memory. - Fix DSS PLL2 addresses that have gone unused for now - Select erratum 430973 for omap3, this is now safe to do and can save quite a bit of debugging time for people who may have left it out. * tag 'omap-for-v4.7/fixes-powedomain' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_mem_ret ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_logic_ret ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON ARM: OMAP2+: Select OMAP_INTERCONNECT for SOC_AM43XX ARM: dts: DRA74x: fix DSS PLL2 addresses ARM: OMAP2: Enable Errata 430973 for OMAP3 + Linux 4.7-rc2 Signed-off-by: Olof Johansson <olof@lixom.net>
show more ...
|
Revision tags: v4.6.2, v4.4.13, openbmc-20160606-1, v4.6.1, v4.4.12 |
|
#
8d29bdba |
| 24-May-2016 |
Dave Gerlach <d-gerlach@ti.com> |
ARM: OMAP2+: Select OMAP_INTERCONNECT for SOC_AM43XX AM43XX SoCs make use of the omap_l3_noc driver so explicitly select OMAP_INTERCONNECT in the Kconfig for SOC_AM43XX to ensure it alwa
ARM: OMAP2+: Select OMAP_INTERCONNECT for SOC_AM43XX AM43XX SoCs make use of the omap_l3_noc driver so explicitly select OMAP_INTERCONNECT in the Kconfig for SOC_AM43XX to ensure it always gets enabled for AM43XX only builds. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
Revision tags: openbmc-20160521-1 |
|
#
2e4094bd |
| 19-May-2016 |
Nishanth Menon <nm@ti.com> |
ARM: OMAP2: Enable Errata 430973 for OMAP3 Enable Erratum 430973 similar to commit 5c86c5339c56 ("ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3") - Since multiple def
ARM: OMAP2: Enable Errata 430973 for OMAP3 Enable Erratum 430973 similar to commit 5c86c5339c56 ("ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3") - Since multiple defconfigs can exist from various points of view (multi_v7, omap2plus etc.. it is always better to enable the erratum from the Kconfig selection point of view so that downstream kernels dont have to rediscover this all over again. Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
5c34a4e8 |
| 02-Jun-2016 |
Linus Walleij <linus.walleij@linaro.org> |
ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "s
ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. When ordering the symbols the following rationale was used: if the selects were in alphabetical order, I moved select GPIOLIB to be in alphabetical order, but if the selects were not maintained in alphabetical order, I just replaced "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB". Cc: Michael Büsch <m@bues.ch> Cc: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
show more ...
|
Revision tags: v4.4.11, openbmc-20160518-1, v4.6 |
|
#
65db875d |
| 12-May-2016 |
Dave Gerlach <d-gerlach@ti.com> |
ARM: OMAP2+: AM43XX: Enable fixes for Cortex-A9 errata This patch explicitly enables the fixes for the below errata applicable for AM43x Socs as was done for OMAP4. 754322: Faul
ARM: OMAP2+: AM43XX: Enable fixes for Cortex-A9 errata This patch explicitly enables the fixes for the below errata applicable for AM43x Socs as was done for OMAP4. 754322: Faulty MMU translations following ASID switch 775420: A data cache maintenance operation which aborts, followed by an ISB, without any DSB in-between, might lead to deadlock Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
Revision tags: v4.4.10, openbmc-20160511-1, openbmc-20160505-1, v4.4.9, v4.4.8, v4.4.7, openbmc-20160329-2, openbmc-20160329-1, openbmc-20160321-1, v4.4.6, v4.5, v4.4.5, v4.4.4, v4.4.3, openbmc-20160222-1, v4.4.2, openbmc-20160212-1, openbmc-20160210-1, openbmc-20160202-2, openbmc-20160202-1, v4.4.1, openbmc-20160127-1, openbmc-20160120-1, v4.4, openbmc-20151217-1, openbmc-20151210-1, openbmc-20151202-1, openbmc-20151123-1, openbmc-20151118-1, openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6 |
|
#
c0053bd5 |
| 06-Aug-2015 |
Nishanth Menon <nm@ti.com> |
ARM: OMAP5 / DRA7: Introduce workaround for 801819 Add workaround for Cortex-A15 ARM erratum 801819 which says in summary that "A livelock can occur in the L2 cache arbitration that migh
ARM: OMAP5 / DRA7: Introduce workaround for 801819 Add workaround for Cortex-A15 ARM erratum 801819 which says in summary that "A livelock can occur in the L2 cache arbitration that might prevent a snoop from completing. Under certain conditions this can cause the system to deadlock. " Recommended workaround is as follows: Do both of the following: 1) Do not use the write-back no-allocate memory type. 2) Do not issue write-back cacheable stores at any time when the cache is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it is implementation defined whether cacheable stores update the cache when the cache is disabled it is not expected that any portable code will execute cacheable stores when the cache is disabled. For implementations of Cortex-A15 configured without the “L2 arbitration register slice” option (typically one or two core systems), you must also do the following: 3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111 So, we provide an option to disable write streaming on OMAP5 and DRA7. It is a rare condition to occur and may be enabled selectively based on platform acceptance of risk. Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3] is set to 0. Based on ARM errata Document revision 18.0 (22 Nov 2013) Note: the configuration for the workaround needs to be done with each CPU bringup, since CPU0 bringup is done by bootloader, it is recommended to have the workaround in the bootloader, kernel also does ensure that CPU0 has the workaround and makes the workaround active when CPU1 gets active. With CONFIG_SMP disabled, it is expected to be done by the bootloader. This does show significant degradation in synthetic tests such as mbw (https://packages.qa.debian.org/m/mbw.html) mbw -n 100 100|grep AVG (on a test platform) Without enabling the erratum: AVG Method: MEMCPY Elapsed: 0.13406 MiB: 100.00000 Copy: 745.913 MiB/s AVG Method: DUMB Elapsed: 0.06746 MiB: 100.00000 Copy: 1482.357 MiB/s AVG Method: MCBLOCK Elapsed: 0.03058 MiB: 100.00000 Copy: 3270.569 MiB/s After enabling the erratum: AVG Method: MEMCPY Elapsed: 0.13757 MiB: 100.00000 Copy: 726.913 MiB/s AVG Method: DUMB Elapsed: 0.12024 MiB: 100.00000 Copy: 831.668 MiB/s AVG Method: MCBLOCK Elapsed: 0.09243 MiB: 100.00000 Copy: 1081.942 MiB/s Most benchmarks are designed for specific performance analysis, so overall usecase must be considered before making a decision to enable/disable the erratum workaround. Pending internal investigation, the erratum is kept disabled by default. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Tony Lindgren <tony@atomide.com> Suggested-by: Richard Woodruff <r-woodruff2@ti.com> Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
54011103 |
| 14-Dec-2015 |
Felipe Balbi <balbi@ti.com> |
ARM: OMAP2+: AM43xx: select ARM TWD timer Make sure to tell the kernel that AM437x devices have ARM TWD timer. Signed-off-by: Felipe Balbi <balbi@ti.com> [grygorii.strashko@ti.c
ARM: OMAP2+: AM43xx: select ARM TWD timer Make sure to tell the kernel that AM437x devices have ARM TWD timer. Signed-off-by: Felipe Balbi <balbi@ti.com> [grygorii.strashko@ti.com: drop ARM Global timer selection, because it's incompatible with PM (cpuidle/cpufreq). So, it's unsafe to enable it unconditionally] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
0b3e6fca |
| 14-Dec-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
ARM: OMAP2+: am43xx: enable GENERIC_CLOCKEVENTS_BROADCAST System will misbehave in the following case: - AM43XX only build (UP); - CONFIG_CPU_IDLE=y - ARM TWD timer enabled and s
ARM: OMAP2+: am43xx: enable GENERIC_CLOCKEVENTS_BROADCAST System will misbehave in the following case: - AM43XX only build (UP); - CONFIG_CPU_IDLE=y - ARM TWD timer enabled and selected as clockevent device. In the above case, It's expected that broadcast timer will be used as backup timer when CPUIdle will put MPU in low power states where ARM TWD will stop and lose its context. But, the CONFIG_SMP might not be selected when kernel is built for AM43XX SoC only and, as result, GENERIC_CLOCKEVENTS_BROADCAST option will not be selected also. This will break CPUIdle and System will stuck in low power states. Hence, fix it by selecting GENERIC_CLOCKEVENTS_BROADCAST option for AM43XX SoCs always and add empty tick_broadcast() function implementation - no need to send any IPI on UP. After this change timer1 will be selected as broadcast timer the same way as for SMP, and CPUIdle will work properly. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
fc827928 |
| 26-Nov-2015 |
Grygorii Strashko <grygorii.strashko@ti.com> |
ARM: OMAP2+: enable REGULATOR_FIXED_VOLTAGE Enable REGULATOR_FIXED_VOLTAGE for all OMAP2+ platforms otherwise system can't boot from SD-card when kernel is built for single SoC (for
ARM: OMAP2+: enable REGULATOR_FIXED_VOLTAGE Enable REGULATOR_FIXED_VOLTAGE for all OMAP2+ platforms otherwise system can't boot from SD-card when kernel is built for single SoC (for example, with CONFIG_SOC_DRA7XX=y only). It's also required for almost all TI SoC's platforms. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
a5e1d715 |
| 10-Nov-2015 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "Again we have a sizable (but not huge) cleanup branch
Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "Again we have a sizable (but not huge) cleanup branch with a net delta of about -3k lines. Main contents here is: - A bunch of development/cleanup of a few PXA boards - Removal of bockw platforms on shmobile, since the platform has now gone completely multiplatform. Whee! - move of the 32kHz timer on OMAP to a proper timesource - Misc cleanup of older OMAP material (incl removal of one board file) - Switch over to new common PWM lookup support for several platforms There's also a handful of other cleanups across the tree, but the above are the major pieces" * tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (103 commits) ARM: OMAP3: hwmod data: Remove legacy mailbox data and addrs ARM: DRA7: hwmod data: Remove spinlock hwmod addrs ARM: OMAP4: hwmod data: Remove spinlock hwmod addrs ARM: DRA7/AM335x/AM437x: hwmod: Remove gpmc address space from hwmod data ARM: Remove __ref on hotplug cpu die path ARM: Remove open-coded version of IRQCHIP_DECLARE arm: omap2: board-generic: use omap4_local_timer_init for AM437x ARM: DRA7/AM335x/AM437x: hwmod: Remove elm address space from hwmod data ARM: OMAP: Remove duplicated operand in OR operation clocksource: ti-32k: make it depend on GENERIC_CLOCKSOURCE ARM: pxa: remove incorrect __init annotation on pxa27x_set_pwrmode ARM: pxa: raumfeld: make some variables static ARM: OMAP: Change all cpu_is_* occurences to soc_is_* for id.c ARM: OMAP2+: Rename cpu_is macros to soc_is arm: omap2: timer: limit hwmod usage to non-DT boots arm: omap2+: select 32k clocksource driver clocksource: add TI 32.768 Hz counter driver arm: omap2: timer: rename omap_sync32k_timer_init() arm: omap2: timer: always call clocksource_of_init() when DT arm: omap2: timer: move realtime_counter_init() around ...
show more ...
|
#
041c7951 |
| 10-Nov-2015 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: "This time we have a very typical update which is mostly fixes and
Merge tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine updates from Vinod Koul: "This time we have a very typical update which is mostly fixes and updates to drivers and no new drivers. - the biggest change is coming from Peter for edma cleanup which even caused some last minute regression, things seem settled now - idma64 and dw updates - iotdma updates - module autoload fixes for various drivers - scatter gather support for hdmac" * tag 'dmaengine-4.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (77 commits) dmaengine: edma: Add dummy driver skeleton for edma3-tptc Revert "ARM: DTS: am33xx: Use the new DT bindings for the eDMA3" Revert "ARM: DTS: am437x: Use the new DT bindings for the eDMA3" dmaengine: dw: some Intel devices has no memcpy support dmaengine: dw: platform: provide platform data for Intel dmaengine: dw: don't override platform data with autocfg dmaengine: hdmac: Add scatter-gathered memset support dmaengine: hdmac: factorise memset descriptor allocation dmaengine: virt-dma: Fix kernel-doc annotations ARM: DTS: am437x: Use the new DT bindings for the eDMA3 ARM: DTS: am33xx: Use the new DT bindings for the eDMA3 dmaengine: edma: New device tree binding dmaengine: Kconfig: edma: Select TI_DMA_CROSSBAR in case of ARCH_OMAP dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx dmaengine: edma: Merge the of parsing functions dmaengine: edma: Do not allocate memory for edma_rsv_info in case of DT boot dmaengine: edma: Refactor the dma device and channel struct initialization dmaengine: edma: Get qDMA channel information from HW also dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq dmaengine: edma: Correct PaRAM access function names (_parm_ to _param_) ...
show more ...
|
#
6a3b764b |
| 16-Oct-2015 |
Tony Lindgren <tony@atomide.com> |
ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory On boards with more than 2GB of RAM booting goes wrong with things not working and we're getting lots of l3 warnings:
ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory On boards with more than 2GB of RAM booting goes wrong with things not working and we're getting lots of l3 warnings: WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x384() 44000000.ocp:L3 Custom Error: MASTER MMC6 TARGET DMM1 (Idle): Data Access in User mode during Functional access ... [<c044e158>] (scsi_add_host_with_dma) from [<c04705c8>] (ata_scsi_add_hosts+0x5c/0x18c) [<c04705c8>] (ata_scsi_add_hosts) from [<c046b13c>] (ata_host_register+0x150/0x2cc) [<c046b13c>] (ata_host_register) from [<c046b38c>] (ata_host_activate+0xd4/0x124) [<c046b38c>] (ata_host_activate) from [<c047f42c>] (ahci_host_activate+0x5c/0x194) [<c047f42c>] (ahci_host_activate) from [<c0480854>] (ahci_platform_init_host+0x1f0/0x3f0) [<c0480854>] (ahci_platform_init_host) from [<c047c9dc>] (ahci_probe+0x70/0x98) [<c047c9dc>] (ahci_probe) from [<c04220cc>] (platform_drv_probe+0x54/0xb4) Let's fix the issue by enabling ZONE_DMA for LPAE. Note that we need to limit dma_zone_size to 2GB as the rest of the RAM is beyond the 4GB limit. Let's also fix things for dra7 as done in similar patches in the TI tree by Lokesh Vutla <lokeshvutla@ti.com>. Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
show more ...
|
#
429ac200 |
| 05-Oct-2015 |
Felipe Balbi <balbi@ti.com> |
arm: omap2+: select 32k clocksource driver Now that we have a 32k clocksource driver, let's select it for OMAP2PLUS builds. Signed-off-by: Felipe Balbi <balbi@ti.com>
|
#
2b6b3b74 |
| 14-Oct-2015 |
Peter Ujfalusi <peter.ujfalusi@ti.com> |
ARM/dmaengine: edma: Merge the two drivers under drivers/dma/ Move the code out from arch/arm/common and merge it inside of the dmaengine driver. This change is done with as minimal
ARM/dmaengine: edma: Merge the two drivers under drivers/dma/ Move the code out from arch/arm/common and merge it inside of the dmaengine driver. This change is done with as minimal (if eny) functional change to the code as possible to avoid introducing regression. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
show more ...
|