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d6a61563 |
| 31-Aug-2009 |
Sekhar Nori <nsekhar@ti.com> |
davinci: support changing the clock rate in clock framework clk_round_rate, clk_set_rate have been updated to handle dynamic frequency changes. The motivation behind the changes
davinci: support changing the clock rate in clock framework clk_round_rate, clk_set_rate have been updated to handle dynamic frequency changes. The motivation behind the changes is to support dynamic CPU frequency change. davinci_set_pllrate() changes the PLL rate of a given PLL. This function has been presented as a generic function though it has been tested only on OMAP-L138 EVM. No other currently available DaVinci device will probably use this function, but any future device specific changes will hopefully be small enough to get taken care using a cpu_is_xxx() macro. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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de381a91 |
| 31-Aug-2009 |
Sekhar Nori <nsekhar@ti.com> |
davinci: make clock rate re-calculation easy Make clock rate recalculation easy by having a re-calculate function for each clock. The existing functions for calculation of outpu
davinci: make clock rate re-calculation easy Make clock rate recalculation easy by having a re-calculate function for each clock. The existing functions for calculation of output rates of PLL and PLL-derived sysclks have been convered to the new re-calculate API. A new function is introduced to take care of rate (re)calculation for leaf clocks. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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f02bf3b3 |
| 31-Aug-2009 |
Sekhar Nori <nsekhar@ti.com> |
davinci: enable easy top down traversal of clock tree Achieve easy top down traversal of clock tree by keeping track of each clock's list of children. This is useful in supporti
davinci: enable easy top down traversal of clock tree Achieve easy top down traversal of clock tree by keeping track of each clock's list of children. This is useful in supporting DVFS where clock rates of all children need to be updated in an efficient manner. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Revision tags: v2.6.31-rc8, v2.6.31-rc7, v2.6.31-rc6, v2.6.31-rc5, v2.6.31-rc4, v2.6.31-rc3, v2.6.31-rc2, v2.6.31-rc1, v2.6.30, v2.6.30-rc8, v2.6.30-rc7, v2.6.30-rc6, v2.6.30-rc5, v2.6.30-rc4, v2.6.30-rc3 |
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d81d188c |
| 15-Apr-2009 |
Mark A. Greer <mgreer@mvista.com> |
davinci: Add support for multiple PSCs The current code to support the DaVinci Power and Sleep Controller (PSC) assumes that there is only one controller. This assumption is no longer
davinci: Add support for multiple PSCs The current code to support the DaVinci Power and Sleep Controller (PSC) assumes that there is only one controller. This assumption is no longer valid so expand the support to allow greater than one PSC. To accomplish this, put the base addresses for the PSCs in the SoC infrastructure so it can be referenced by the PSC code. This also requires adding an extra parameter to davinci_psc_config() to specify the PSC that is to be enabled/disabled. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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fb631387 |
| 29-Apr-2009 |
Kevin Hilman <khilman@deeprootsystems.com> |
davinci: add platform support for watchdog timer Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Revision tags: v2.6.30-rc2, v2.6.30-rc1, v2.6.29 |
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c5b736d0 |
| 20-Mar-2009 |
Kevin Hilman <khilman@deeprootsystems.com> |
davinci: major rework of clock, PLL, PSC infrastructure This is a significant rework of the low-level clock, PLL and Power Sleep Controller (PSC) implementation for the DaVinci family.
davinci: major rework of clock, PLL, PSC infrastructure This is a significant rework of the low-level clock, PLL and Power Sleep Controller (PSC) implementation for the DaVinci family. The primary goal is to have better modeling if the hardware clocks and features with the aim of DVFS functionality. Highlights: - model PLLs and all PLL-derived clocks - model parent/child relationships of PLLs and clocks - convert to new clkdev layer - view clock frequency and refcount via /proc/davinci_clocks Special thanks to significant contributions and testing by David Brownell. Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Revision tags: v2.6.29-rc8, v2.6.29-rc7, v2.6.29-rc6, v2.6.29-rc5, v2.6.29-rc4, v2.6.29-rc3, v2.6.29-rc2, v2.6.29-rc1, v2.6.28, v2.6.28-rc9, v2.6.28-rc8, v2.6.28-rc7, v2.6.28-rc6, v2.6.28-rc5, v2.6.28-rc4, v2.6.28-rc3, v2.6.28-rc2, v2.6.28-rc1, v2.6.27, v2.6.27-rc9, v2.6.27-rc8, v2.6.27-rc7, v2.6.27-rc6, v2.6.27-rc5, v2.6.27-rc4, v2.6.27-rc3, v2.6.27-rc2, v2.6.27-rc1, v2.6.26, v2.6.26-rc9, v2.6.26-rc8, v2.6.26-rc7, v2.6.26-rc6, v2.6.26-rc5, v2.6.26-rc4, v2.6.26-rc3, v2.6.26-rc2, v2.6.26-rc1, v2.6.25, v2.6.25-rc9, v2.6.25-rc8, v2.6.25-rc7, v2.6.25-rc6, v2.6.25-rc5, v2.6.25-rc4, v2.6.25-rc3, v2.6.25-rc2, v2.6.25-rc1, v2.6.24, v2.6.24-rc8, v2.6.24-rc7, v2.6.24-rc6, v2.6.24-rc5, v2.6.24-rc4, v2.6.24-rc3, v2.6.24-rc2, v2.6.24-rc1, v2.6.23, v2.6.23-rc9, v2.6.23-rc8, v2.6.23-rc7, v2.6.23-rc6, v2.6.23-rc5, v2.6.23-rc4, v2.6.23-rc3, v2.6.23-rc2, v2.6.23-rc1, v2.6.22, v2.6.22-rc7, v2.6.22-rc6, v2.6.22-rc5 |
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3e062b07 |
| 05-Jun-2007 |
Vladimir Barinov <vbarinov@ru.mvista.com> |
[ARM] 4430/1: davinci: clock control support Support clock control driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Kevin Hilman
[ARM] 4430/1: davinci: clock control support Support clock control driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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