ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU

This patch adds support for the BCM5301X/BCM470X SoCs with an ARM CPUs.
Currently just booting to a shell is working and not

ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU

This patch adds support for the BCM5301X/BCM470X SoCs with an ARM CPUs.
Currently just booting to a shell is working and nothing else, no
Ethernet, wifi, flash, ...
I have some pending patches to make Ethernet work for this device.
Mostly device tree support for bcma is missing.

This SoC is used in small office and home router with Broadcom SoCs
it's internal name is Northstar. This code should support the BCM4707,
BCM4708, BCM4709, BCM53010, BCM53011 and BCM53012 SoC. It uses one or
two ARM Cortex A9 Cores, some highlights are 2 PCIe 2.0 controllers,
4 Gigabit Ethernet MACs and a USB 3.0 host controller.

This SoC uses a dual core CPU, but this is currently not implemented.
More information about this SoC can be found here:
http://www.anandtech.com/show/5925/broadcom-announces-bcm4708x-and-bcm5301x-socs-for-80211ac-routers

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Christian Daudt <bcm@fixthebug.org>
Signed-off-by: Matt Porter <mporter@linaro.org>

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ARM: bcm2835: Move to mach-bcm directory

Move the bcm2835 board file into the mach-bcm directory. This allows us
to get rid of the mach-bcm2835 directory with the associated Kconfig
and Makefile.

S

ARM: bcm2835: Move to mach-bcm directory

Move the bcm2835 board file into the mach-bcm directory. This allows us
to get rid of the mach-bcm2835 directory with the associated Kconfig
and Makefile.

Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
[swarren, adjust defconfig so ARCH_BCM2835 still gets enabled]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>

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rename ARCH_BCM to ARCH_BCM_MOBILE (mach-bcm)

Currently ARCH_BCM has been used for Broadcom
Mobile V7 based SoCs. In order to allow other Broadcom
SoCs to also use mach-bcm directory and files, this

rename ARCH_BCM to ARCH_BCM_MOBILE (mach-bcm)

Currently ARCH_BCM has been used for Broadcom
Mobile V7 based SoCs. In order to allow other Broadcom
SoCs to also use mach-bcm directory and files, this patch
renames the original ARCH_BCM to ARCH_BCM_MOBILE, and
uses ARCH_BCM to define any Broadcom chip residing
in mach-bcm directory.

Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Acked-by: Olof Johansson <olof@lixom.net>

Changes from v2:
- switch ARCH_MULTIPLATFORM from select to depends
- remove 'default y' from BCM_MOBILE

Changes from v1:
- fix alpha ordering in dts/Makefile
- break into 4 patches for separate subsys

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ARM: bcm: Rename board_bcm

In order to support multiple SoC models in the mach-bcm
directory, board_bcm.c is being renamed board_bcm281xx.c

Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signe

ARM: bcm: Rename board_bcm

In order to support multiple SoC models in the mach-bcm
directory, board_bcm.c is being renamed board_bcm281xx.c

Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Christian Daudt <csd@broadcom.com>

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ARM: bcm281xx: Board specific reboot code

This patch adds the code needed to trigger a reboot on the bcm281xx
family.

Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <

ARM: bcm281xx: Board specific reboot code

This patch adds the code needed to trigger a reboot on the bcm281xx
family.

Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Alex Elder <alex.elder@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>

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ARM: bcm281xx: Add L2 cache enable code

- Adds a module to provide calls into secure monitor mode
- Uses this module to make secure monitor calls to enable L2 cache.

Updates from V1:
- Split DT por

ARM: bcm281xx: Add L2 cache enable code

- Adds a module to provide calls into secure monitor mode
- Uses this module to make secure monitor calls to enable L2 cache.

Updates from V1:
- Split DT portion into separate patch
- replace #ifdef-ed L2 code with "if".
- move init call to board init

Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

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Add support for generic BCM SoC chipsets

In order to start upstreaming Broadcom SoC support, create
a starting hierarchy, arch and dts files.
The first support SoC family that is planned is the
BCM2

Add support for generic BCM SoC chipsets

In order to start upstreaming Broadcom SoC support, create
a starting hierarchy, arch and dts files.
The first support SoC family that is planned is the
BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile
SoC cores.
This code is just the skeleton code for get the machine upstreamed. It
has been made MULTIPLATFORM compatible.
Next steps
----------
Upstream a basic set of drivers - sufficient for a console boot to
ramdisk. These will includer timer, gpio, i2c drivers.
After this basic set, we will proceed with a more comprehensive set
of drivers for the 281XX SoC family.

v2 patch mods
--------
- Remove l2x0_of_init call as there were problems with the code.
A separate patch will be submitted with cache init code
- Rename capri files and refs to bcm281xx-based names
- Add bcm281xx binding doc
- various misc cleanups

v3 patch mods
-------------
- Remove extra #include lines
- Remove remaining references to capri
- dt uart chipset string added
- cleaned up chip # references

v4 patch mods
-------------
- swap order of compatible definitions for uart
- fix typo

v5 patch mods
-------------
- Rename bcm281xx to bcm11351 in dts+code,
leaving references to bcm281xx only in help+comments.

v6 patch mods
-------------
- fix typo in uart 'compatible' string

Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

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ARM: bcm: Add support for BCM2711 SoC

Add the BCM2711 to ARCH_BCM2835, but use new machine board code
because of the differences.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>

ARM: bcm: Add support for BCM2711 SoC

Add the BCM2711 to ARCH_BCM2835, but use new machine board code
because of the differences.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Florian Fanelli <f.fainelli@gmail.com>

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ARM: use arch_extension directive instead of arch argument

The LLVM Target parser currently does not allow to specify the security
extension as part of -march (see also LLVM Bug 40186 [0

ARM: use arch_extension directive instead of arch argument

The LLVM Target parser currently does not allow to specify the security
extension as part of -march (see also LLVM Bug 40186 [0]). When trying
to use Clang with LLVM's integrated assembler, this leads to build
errors such as this:
clang-8: error: the clang compiler does not support '-Wa,-march=armv7-a+sec'

Use ".arch_extension sec" to enable the security extension in a more
portable fasion. Also make sure to use ".arch armv7-a" in case a v6/v7
multi-platform kernel is being built.

Note that this is technically not exactly the same as the old code
checked for availabilty of the security extension by calling as-instr.
However, there are already other sites which use ".arch_extension sec"
unconditionally, hence de-facto we need an assembler capable of
".arch_extension sec" already today (arch/arm/mm/proc-v7.S). The
arch extension "sec" is available since binutils 2.21 according to
its documentation [1].

[0] https://bugs.llvm.org/show_bug.cgi?id=40186
[1] https://sourceware.org/binutils/docs-2.21/as/ARM-Options.html

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Mans Rullgard <mans@mansr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

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ARM: bcm: Add support for Broadcom Hurricane 2 SoC

Add a Kconfig entry point and basic machine board code for the Broadcom
Hurricane 2 SoCs used in switching products.

Acked-by:

ARM: bcm: Add support for Broadcom Hurricane 2 SoC

Add a Kconfig entry point and basic machine board code for the Broadcom
Hurricane 2 SoCs used in switching products.

Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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irqchip: bcm2836: Move SMP startup code to arch/arm (v2)

In order to easily provide SMP for BCM2837 on 32-bit and 64-bit
the SMP startup code was placed in irq-bcm2836. That's not the

irqchip: bcm2836: Move SMP startup code to arch/arm (v2)

In order to easily provide SMP for BCM2837 on 32-bit and 64-bit
the SMP startup code was placed in irq-bcm2836. That's not the
right approach. So move this code where it belongs.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: 41f4988cc287 ("irqchip/bcm2836: Add SMP support for the 2836")
Tested-by: Eric Anholt <eric@anholt.net>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>

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ARM: Add support for Broadcom BCM23550 SoC

BCM23550 is a quad-A7 SoC used on the Broadcom "Sparrow" board.
It shares many IP blocks with other Broadcom Kona chips.

Signed-off-by

ARM: Add support for Broadcom BCM23550 SoC

BCM23550 is a quad-A7 SoC used on the Broadcom "Sparrow" board.
It shares many IP blocks with other Broadcom Kona chips.

Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: BCM: Add SMP support for Broadcom 4708

Add SMP support for Broadcom's 4708 SoCs.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de

ARM: BCM: Add SMP support for Broadcom 4708

Add SMP support for Broadcom's 4708 SoCs.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Kapil Hali <kapilh@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: BCM: Add SMP support for Broadcom NSP

Add SMP support for Broadcom's Northstar Plus SoC
cpu enable method. This changes also consolidates
iProc family's - BCM NSP and BCM Kona,

ARM: BCM: Add SMP support for Broadcom NSP

Add SMP support for Broadcom's Northstar Plus SoC
cpu enable method. This changes also consolidates
iProc family's - BCM NSP and BCM Kona, platform
SMP handling in a common file.

Northstar Plus SoC is based on ARM Cortex-A9
revision r3p0 which requires configuration for ARM
Errata 764369 for SMP. This change adds the needed
configuration option.

Signed-off-by: Kapil Hali <kapilh@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: NSP: Add basic support for Broadcom Northstar Plus SoC

Broadcom Northstar Plus family of SoCs are used for switching
control and management applications as well as residential
r

ARM: NSP: Add basic support for Broadcom Northstar Plus SoC

Broadcom Northstar Plus family of SoCs are used for switching
control and management applications as well as residential
router/gateway applications. The SoC features dual core Cortex
A9 ARM CPUs, integrating several peripheral interfaces including
multiple Gigabit Ethernet PHYs, DDR3 memory, PCIE Gen-2, USB 2.0
and USB 3.0, serial and NAND flash, SATA and several other IO
controllers.

Signed-off-by: Kapil Hali <kapilh@broadcom.com>
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Acked-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: BCM63xx: Remove custom secondary_startup function

With commit 02b4e2756e01c623cc4dbceae4b07be75252db5b ("ARM: v7 setup
function should invalidate L1 cache"), the default secondary_s

ARM: BCM63xx: Remove custom secondary_startup function

With commit 02b4e2756e01c623cc4dbceae4b07be75252db5b ("ARM: v7 setup
function should invalidate L1 cache"), the default secondary_startup
function for ARMv7 CPUs does invalidate the L1 cache, which was the sole
reason why BCM63xx had to have its own secondary_startup implementation.

Now that the secondary_startup takes care of this, we can completely
remove that code.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded su

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:

- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...

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ARM: v7 setup function should invalidate L1 cache

All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU. This is because the L

ARM: v7 setup function should invalidate L1 cache

All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU. This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state. Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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ARM: BCM63xx: Add SMP support for BCM63138

Add support for booting the secondary CPU on BCM63138, this involves:

- locating the bootlut to write the reset vector
- powering up t

ARM: BCM63xx: Add SMP support for BCM63138

Add support for booting the secondary CPU on BCM63138, this involves:

- locating the bootlut to write the reset vector
- powering up the second CPU when we need to using the DT-supplied PMB
references
- disabling VFP when enabled such that we can keep having SMP

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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Merge tag 'arm-soc/for-3.19/cygnus-platform-v2' of http://github.com/brcm/linux into next/soc

Pull "Broadcom Cygnus SoC platform support" from Florian Fainelli:

This pull request co

Merge tag 'arm-soc/for-3.19/cygnus-platform-v2' of http://github.com/brcm/linux into next/soc

Pull "Broadcom Cygnus SoC platform support" from Florian Fainelli:

This pull request contains the platform code to support the Broadcom Cygnus SoC
using the iProc architecture:

- add support for the Broadcom Cygnus SoC
- consolidate the BCM5301X Kconfig options under the iProc menuconfig entry
- remove one level of menu in menuconfig

* tag 'arm-soc/for-3.19/cygnus-platform-v2' of http://github.com/brcm/linux:
ARM: mach-bcm: ARCH_BCM_MOBILE: remove one level of menu from Kconfig
ARM: mach-bcm: Consolidate currently supported IPROC SoCs
ARM: cygnus: Initial support for Broadcom Cygnus SoC

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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ARM: cygnus: Initial support for Broadcom Cygnus SoC

Adds initial support for the Cygnus SoC based on Broadcom’s iProc series.

Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-

ARM: cygnus: Initial support for Broadcom Cygnus SoC

Adds initial support for the Cygnus SoC based on Broadcom’s iProc series.

Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Desmond Liu <desmondl@broadcom.com>
Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com>
Tested-by: Jonathan Richardson <jonathar@broadcom.com>
Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: brcmstb: reintroduce SMP support

Support for SMP bringup of the B15 CPUs on Broadcom STB chips was added
in commit 4fbe66d9903425156c193ae44c81c0f7557755c4 but was reverted in
c

ARM: brcmstb: reintroduce SMP support

Support for SMP bringup of the B15 CPUs on Broadcom STB chips was added
in commit 4fbe66d9903425156c193ae44c81c0f7557755c4 but was reverted in
commit fc3e825fa91636a5d1b992e769b2d8279877bfad to address some late
review comments. This reintroduces SMP support.

Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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Merge tag 'bcm63138-v4' of http://github.com/brcm/linux into next/soc

Merge "ARM: BCM: Broadcom BCM63138 support" from Florian Fainelli:

This patchset adds very minimal support for

Merge tag 'bcm63138-v4' of http://github.com/brcm/linux into next/soc

Merge "ARM: BCM: Broadcom BCM63138 support" from Florian Fainelli:

This patchset adds very minimal support for the BCM63138 SoC which is
a xDSL SoC using a dual Cortex A9 CPU complex.

* tag 'bcm63138-v4' of http://github.com/brcm/linux:
MAINTAINERS: add entry for the Broadcom BCM63xx ARM SoCs
ARM: BCM63XX: add BCM963138DVT Reference platform DTS
ARM: BCM63XX: add BCM63138 minimal Device Tree
ARM: BCM63XX: add low-level UART debug support
ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC

Conflicts:
arch/arm/Kconfig.debug

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC

This patch adds basic support for the Broadcom BCM63138 DSL SoC which is
using a dual-core Cortex A9 system. Add the ver

ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC

This patch adds basic support for the Broadcom BCM63138 DSL SoC which is
using a dual-core Cortex A9 system. Add the very minimum required code
boot Linux on this SoC.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

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ARM: brcmstb: revert SMP support

There were several issues (of varying degree of importance) pointed out
with this code late in the review cycle, yet the code was still merged.
Let's

ARM: brcmstb: revert SMP support

There were several issues (of varying degree of importance) pointed out
with this code late in the review cycle, yet the code was still merged.
Let's rip it out for now and look at resubmitting at a later time.

This reverts most of commit 4fbe66d9903425156c193ae44c81c0f7557755c4.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

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