History log of /openbmc/linux/MAINTAINERS (Results 376 – 400 of 24122)
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# d4284874 16-Apr-2023 William Breathitt Gray <william.gray@linaro.org>

counter: i8254: Introduce the Intel 8254 interface library module

Exposes consumer library functions providing support for interfaces
compatible with the venerable Intel 8254 Programmable Interval T

counter: i8254: Introduce the Intel 8254 interface library module

Exposes consumer library functions providing support for interfaces
compatible with the venerable Intel 8254 Programmable Interval Timer
(PIT).

The Intel 8254 PIT first appeared in the early 1980s and was used
initially in IBM PC compatibles. The popularity of the original Intel
825x family of chips led to many subsequent variants and clones of the
interface in various chips and integrated circuits. Although still
popular, interfaces compatible with the Intel 8254 PIT are nowdays
typically found embedded in larger VLSI processing chips and FPGA
components rather than as discrete ICs.

A CONFIG_I8254 Kconfig option is introduced by this patch. Modules
wanting access to these i8254 library functions should select this
Kconfig option, and import the I8254 symbol namespace.

Link: https://lore.kernel.org/r/f6fe32c2db9525d816ab1a01f45abad56c081652.1681665189.git.william.gray@linaro.org/
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>

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# c9cb7e72 25-May-2023 Alexandre Torgue <alexandre.torgue@foss.st.com>

MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE

STM32 SoCs based on Armv8 have been added to the STM32 family. Those new
SoCs are maintained as legacy STM32 MPU.

Signed-off-by: Alexandre Torgue <

MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE

STM32 SoCs based on Armv8 have been added to the STM32 family. Those new
SoCs are maintained as legacy STM32 MPU.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

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# 23902f98 22-May-2023 James Seo <james@equiv.tech>

hwmon: add HP WMI Sensors driver

Hewlett-Packard (and some HP Compaq) business-class computers report
hardware monitoring information via WMI. This driver exposes that
information to hwmon.

Initial

hwmon: add HP WMI Sensors driver

Hewlett-Packard (and some HP Compaq) business-class computers report
hardware monitoring information via WMI. This driver exposes that
information to hwmon.

Initial support is provided for temperature, fan speed, and intrusion
sensor types. Provisional support is provided for voltage and current
sensor types.

HP's WMI implementation permits many other types of numeric sensors.
Therefore, a debugfs interface is also provided to enumerate and
inspect all numeric sensors visible on the WMI side. This should
facilitate adding support for other sensor types in the future.

Tested on a HP Z420, a HP EliteOne 800 G1, and a HP Compaq Elite 8300
SFF.

Note that provisionally supported sensor types are untested and seem
to be rare-to-nonexistent in the wild, having been encountered
neither on test systems nor in ACPI dumps from the Linux Hardware
Database. They are included because their popularity in general makes
their presence on past or future HP systems plausible and because no
doubt exists as to how the sensors themselves would be represented in
WMI (alarm attributes will need to wait for hardware to be located).
A 2005 HP whitepaper gives the relevant sensor object MOF definition
and sensor value scaling calculation, and both this driver and the
official HP Performance Advisor utility comply with them (confirmed
in the latter case by reverse engineering).

Link: https://h20331.www2.hp.com/hpsub/downloads/cmi_whitepaper.pdf
Signed-off-by: James Seo <james@equiv.tech>
Link: https://lore.kernel.org/r/20230522115645.509701-1-james@equiv.tech
[groeck: Set error return value for intrusion writes to -EINVAL.
Always accept writes of 0 even if there was no intrusion. ]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

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# 16d60ba8 24-May-2023 Daniel Matyas <daniel.matyas@analog.com>

hwmon: Add MAX31827 driver

MAX31827 is a low-power temperature switch with I2C interface.

The device is a ±1°C accuracy from -40°C to +125°C
(12 bits) local temperature switch and sensor with I2C/S

hwmon: Add MAX31827 driver

MAX31827 is a low-power temperature switch with I2C interface.

The device is a ±1°C accuracy from -40°C to +125°C
(12 bits) local temperature switch and sensor with I2C/SM-
Bus interface. The combination of small 6-bump wafer-lev-
el package (WLP) and high accuracy makes this temper-
ature sensor/switch ideal for a wide range of applications.

Signed-off-by: Daniel Matyas <daniel.matyas@analog.com>
Link: https://lore.kernel.org/r/20230524160131.14081-2-daniel.matyas@analog.com
[groeck: Improved define alignment, return -EINVAL after bad user input,
fixed up compatible statement]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

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# 9702fc87 24-May-2023 Daniel Matyas <daniel.matyas@analog.com>

dt-bindings: hwmon: add MAX31827

MAX31827 is a low-power temperature switch with I2C interface.

The device is a ±1°C accuracy from -40°C to +125°C
(12 bits) local temperature switch and sensor with

dt-bindings: hwmon: add MAX31827

MAX31827 is a low-power temperature switch with I2C interface.

The device is a ±1°C accuracy from -40°C to +125°C
(12 bits) local temperature switch and sensor with I2C/SM-
Bus interface. The combination of small 6-bump wafer-lev-
el package (WLP) and high accuracy makes this temper-
ature sensor/switch ideal for a wide range of applications.

Signed-off-by: Daniel Matyas <daniel.matyas@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230524160131.14081-1-daniel.matyas@analog.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>

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# 25bda386 06-Jun-2023 Thomas Gleixner <tglx@linutronix.de>

MAINTAINERS: Add entry for debug objects

This is overdue and an oversight.

Add myself to this file deespite the fact that I'm trying to reduce the
number of entries in this file which have my name

MAINTAINERS: Add entry for debug objects

This is overdue and an oversight.

Add myself to this file deespite the fact that I'm trying to reduce the
number of entries in this file which have my name attached, but in the
hope that patches wont get picked up elsewhere completely unreviewed and
unnoticed.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

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# d1f11f41 05-Jun-2023 Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

MAINTAINERS: add Andy Shevchenko as reviewer for the GPIO subsystem

Andy has been a de-facto reviewer for all things GPIO for a long time so
let's make it official.

Signed-off-by: Bartosz Golaszews

MAINTAINERS: add Andy Shevchenko as reviewer for the GPIO subsystem

Andy has been a de-facto reviewer for all things GPIO for a long time so
let's make it official.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Andy Shevchenko <andy@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

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# 315a3d57 06-Jun-2023 Ivan Orlov <ivan.orlov0322@gmail.com>

ALSA: Implement the new Virtual PCM Test Driver

We have a lot of different virtual media drivers, which can be used for
testing of the userspace applications and media subsystem middle layer.
Howeve

ALSA: Implement the new Virtual PCM Test Driver

We have a lot of different virtual media drivers, which can be used for
testing of the userspace applications and media subsystem middle layer.
However, all of them are aimed at testing the video functionality and
simulating the video devices. For audio devices we have only snd-dummy
module, which is good in simulating the correct behavior of an ALSA device.
I decided to write a tool, which would help to test the userspace ALSA
programs (and the PCM middle layer as well) under unusual circumstances
to figure out how they would behave. So I came up with this Virtual PCM
Test Driver.

This new Virtual PCM Test Driver has several features which can be useful
during the userspace ALSA applications testing/fuzzing, or testing/fuzzing
of the PCM middle layer. Not all of them can be implemented using the
existing virtual drivers (like dummy or loopback). Here is what can this
driver do:

- Simulate both capture and playback processes
- Generate random or pattern-based capture data
- Inject delays into the playback and capturing processes
- Inject errors during the PCM callbacks

Also, this driver can check the playback stream for containing the
predefined pattern, which is used in the corresponding selftest to check
the PCM middle layer data transferring functionality. Additionally, this
driver redefines the default RESET ioctl, and the selftest covers this PCM
API functionality as well.

The driver supports both interleaved and non-interleaved access modes, and
have separate pattern buffers for each channel. The driver supports up to
4 channels and up to 8 substreams.

Signed-off-by: Ivan Orlov <ivan.orlov0322@gmail.com>
Acked-by: Jaroslav Kysela <perex@perex.cz>
Link: https://lore.kernel.org/r/20230606193254.20791-2-ivan.orlov0322@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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# 60b7ae37 06-Jun-2023 Caleb Connolly <caleb.connolly@linaro.org>

MAINTAINERS: Adjust Qualcomm driver globbing

The only drivers matching pm8???-* are two levels deep, adjust the glob
to match them.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: h

MAINTAINERS: Adjust Qualcomm driver globbing

The only drivers matching pm8???-* are two levels deep, adjust the glob
to match them.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230529-pm8941-pwrkey-debounce-v1-1-c043a6d5c814@linaro.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

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# 425d827e 06-Jun-2023 Conor Dooley <conor.dooley@microchip.com>

Documentation/process: add soc maintainer handbook

Arnd suggested that adding a maintainer handbook for the SoC "subsystem"
would be helpful in trying to bring on board maintainers for the various
n

Documentation/process: add soc maintainer handbook

Arnd suggested that adding a maintainer handbook for the SoC "subsystem"
would be helpful in trying to bring on board maintainers for the various
new platforms cropping up in RISC-V land.

Add a document briefly describing the role of the SoC subsystem and some
basic advice for (new) platform maintainers.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# a49e482c 16-May-2023 Michal Simek <michal.simek@amd.com>

MAINTAINERS: Switch to @amd.com emails

@xilinx.com is still working but better to switch to new amd.com after
AMD/Xilinx acquisition.

Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Acked

MAINTAINERS: Switch to @amd.com emails

@xilinx.com is still working but better to switch to new amd.com after
AMD/Xilinx acquisition.

Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Acked-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f7773fdd002f89578b9e5262692a563fe7be4123.1684244928.git.michal.simek@amd.com

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# 0545810f 04-Jun-2023 Jacky Huang <ychuang3@nuvoton.com>

dt-bindings: arm: Add initial bindings for Nuvoton platform

Modify Nuvoton NPCM and MA35 platform board bindings
- Move 'nuvoton,npcm-gcr.yaml' from 'bindings/arm/npcm' to
'bindings/soc/nuvoto

dt-bindings: arm: Add initial bindings for Nuvoton platform

Modify Nuvoton NPCM and MA35 platform board bindings
- Move 'nuvoton,npcm-gcr.yaml' from 'bindings/arm/npcm' to
'bindings/soc/nuvoton'.
- Rename the 'bindings/arm/npcm' directory to 'bindings/arm/nuvoton'.
- Add bindings for ARMv8-based Nuvoton SoCs and platform boards, and
include the initial bindings for ma35d1 series development boards.

Modify MAINTAINERS
- Remove the line for 'bindings/arm/npcm/' under ARM/NUVOTON NPCM, as it
has been renamed.
- Add ARM/NUVOTON MA35 for Nuvoton MA35 series SoCs maintainer and files.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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# 196eec40 01-Jun-2023 Maxime Chevallier <maxime.chevallier@bootlin.com>

net: pcs: Drop the TSE PCS driver

Now that we can easily create a mdio-device that represents a
memory-mapped device that exposes an MDIO-like register layout, we don't
need the Altera TSE PCS anymo

net: pcs: Drop the TSE PCS driver

Now that we can easily create a mdio-device that represents a
memory-mapped device that exposes an MDIO-like register layout, we don't
need the Altera TSE PCS anymore, since we can use the Lynx PCS instead.

Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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# 642af0f9 01-Jun-2023 Maxime Chevallier <maxime.chevallier@bootlin.com>

net: mdio: Introduce a regmap-based mdio driver

There exists several examples today of devices that embed an ethernet
PHY or PCS directly inside an SoC. In this situation, either the device
is contr

net: mdio: Introduce a regmap-based mdio driver

There exists several examples today of devices that embed an ethernet
PHY or PCS directly inside an SoC. In this situation, either the device
is controlled through a vendor-specific register set, or sometimes
exposes the standard 802.3 registers that are typically accessed over
MDIO.

As phylib and phylink are designed to use mdiodevices, this driver
allows creating a virtual MDIO bus, that translates mdiodev register
accesses to regmap accesses.

The reason we use regmap is because there are at least 3 such devices
known today, 2 of them are Altera TSE PCS's, memory-mapped, exposed
with a 4-byte stride in stmmac's dwmac-socfpga variant, and a 2-byte
stride in altera-tse. The other one (nxp,sja1110-base-tx-mdio) is
exposed over SPI.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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# 63b679a9 01-Jun-2023 Andi Shyti <andi.shyti@kernel.org>

MAINTAINERS: Add myself as I2C host drivers maintainer

I will help Wolfram out with the i2c controllers patches.

Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Krzysztof Kozlowski <krz

MAINTAINERS: Add myself as I2C host drivers maintainer

I will help Wolfram out with the i2c controllers patches.

Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa@kernel.org>

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# 0fcf8ffd 23-May-2023 Jeffrey Hugo <quic_jhugo@quicinc.com>

MAINTAINERS: Add Carl/Pranjal as QAIC reviewers

Carl and Pranjal have been reviewing the QAIC patches. List them as
reviewers so that they are copied on all developments which will make
it easier f

MAINTAINERS: Add Carl/Pranjal as QAIC reviewers

Carl and Pranjal have been reviewing the QAIC patches. List them as
reviewers so that they are copied on all developments which will make
it easier for them to continue reviewing QAIC patches.

Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Acked-by: Carl Vanderlip <quic_carlv@quicinc.com>
Acked-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230523161421.11017-1-quic_jhugo@quicinc.com

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# 444c17cf 26-May-2023 Michal Simek <michal.simek@amd.com>

MAINTAINERS: Add myself as reviewer instead of Naga

Naga no longer works for AMD/Xilinx and there is no activity from him to
continue to maintain Xilinx related drivers. Add myself instead to be kep

MAINTAINERS: Add myself as reviewer instead of Naga

Naga no longer works for AMD/Xilinx and there is no activity from him to
continue to maintain Xilinx related drivers. Add myself instead to be kept
in loop if there is any need for testing.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[<miquel.raynal@bootlin.com>: Manually apply on top of the latest -rc which
where the MAINTAINERS file got sorted]
Link: https://lore.kernel.org/linux-mtd/06df49c300c53a27423260e99acc217b06d4e588.1684827820.git.michal.simek@amd.com

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# cc9e654a 15-May-2023 Sunil V L <sunilvl@ventanamicro.com>

MAINTAINERS: Add entry for drivers/acpi/riscv

ACPI defines few RISC-V specific tables which need
parsing code added in drivers/acpi/riscv. Add maintainer
entries for this newly created folder.

Sign

MAINTAINERS: Add entry for drivers/acpi/riscv

ACPI defines few RISC-V specific tables which need
parsing code added in drivers/acpi/riscv. Add maintainer
entries for this newly created folder.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-22-sunilvl@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

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# fd4762b6 26-May-2023 Walker Chen <walker.chen@starfivetech.com>

ASoC: starfive: Add JH7110 TDM driver

Add tdm driver support for the StarFive JH7110 SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@micro

ASoC: starfive: Add JH7110 TDM driver

Add tdm driver support for the StarFive JH7110 SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230526145402.450-3-walker.chen@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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# 54aa5b60 11-May-2023 Jesse Brandeburg <jesse.brandeburg@intel.com>

MAINTAINERS: add entry for auxiliary bus

When auxiliary bus was added to the kernel the MAINTAINERS file wasn't
updated with a mention of the files, contributors and reviewers. Fix
that oversight by

MAINTAINERS: add entry for auxiliary bus

When auxiliary bus was added to the kernel the MAINTAINERS file wasn't
updated with a mention of the files, contributors and reviewers. Fix
that oversight by adding Dave and Ira, with GregKH as (same as current)
owner.

CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Acked-by: Dave Ertman <david.m.ertman@intel.com>
Acked-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/20230511164501.3859674-1-jesse.brandeburg@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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# 40994ce0 18-May-2023 Zhu YiXin <yzhu@maxlinear.com>

MAINTAINERS: Add Chuanhua Lei as Intel LGM GW PCIe maintainer

Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINERS entry
for the PCIe driver for Intel LGM GW SoC.

Link: https://lore.ke

MAINTAINERS: Add Chuanhua Lei as Intel LGM GW PCIe maintainer

Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINERS entry
for the PCIe driver for Intel LGM GW SoC.

Link: https://lore.kernel.org/r/20230519044555.3750-2-yzhu@maxlinear.com
Signed-off-by: Zhu YiXin <yzhu@maxlinear.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rahul Tanwar <rahul_tanwar@yahoo.com>
Acked-by: Lei Chuanhua <lchuanhua@maxlinear.com>

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# e6c6ddb3 23-May-2023 Dmitry Rokosov <ddrokosov@sberdevices.ru>

dt-bindings: clock: meson: add A1 PLL clock controller bindings

Add the documentation and dt bindings for Amlogic A1 PLL clock
controller.
Also include new A1 clock controller dt bindings to MAINTAI

dt-bindings: clock: meson: add A1 PLL clock controller bindings

Add the documentation and dt bindings for Amlogic A1 PLL clock
controller.
Also include new A1 clock controller dt bindings to MAINTAINERS.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230523135351.19133-4-ddrokosov@sberdevices.ru
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>

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# 71698da3 30-May-2023 Samuel Iglesias Gonsálvez <siglesias@igalia.com>

MAINTAINERS: Vaibhav Gupta is the new ipack maintainer

I have no longer access to the HW, nor time to properly maintain it.

Adding Vaibhav as maintainer as he currently has access to the HW, he
is

MAINTAINERS: Vaibhav Gupta is the new ipack maintainer

I have no longer access to the HW, nor time to properly maintain it.

Adding Vaibhav as maintainer as he currently has access to the HW, he
is working at CERN (user of these drivers) and he is maintaining them
internally there.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Vaibhav Gupta <vaibhavgupta40@gmail.com>
Link: https://lore.kernel.org/r/20230530083546.4831-1-vaibhavgupta40@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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# 929f4e7c 30-May-2023 Ivan Bornyakov <i.bornyakov@metrotek.ru>

MAINTAINERS: update Microchip MPF FPGA reviewers

As I'm leaving Metrotek, hand over reviewing duty of Microchip MPF FPGA
driver to Vladimir.

Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>

MAINTAINERS: update Microchip MPF FPGA reviewers

As I'm leaving Metrotek, hand over reviewing duty of Microchip MPF FPGA
driver to Vladimir.

Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Vladimir Georgiev <v.georgiev@metrotek.ru>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20230429104838.5064-2-i.bornyakov@metrotek.ru
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20230530134936.634370-2-yilun.xu@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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# aafbb1ee 29-May-2023 Steven Rostedt (Google) <rostedt@goodmis.org>

tracing/rv/rtla: Update MAINTAINERS file to point to proper mailing list

The mailing list that goes to linux-trace-devel is for the tracing
libraries, and the patchwork associated to the tracing lib

tracing/rv/rtla: Update MAINTAINERS file to point to proper mailing list

The mailing list that goes to linux-trace-devel is for the tracing
libraries, and the patchwork associated to the tracing libraries keys
off of that mailing list.

For anything that lives in the Linux kernel proper (including the tools
directory) must go through linux-trace-kernel, as the patchwork to that
list keys off of the Linux kernel proper.

Update the MAINTAINERS file to reflect the proper mailing lists.

Link: https://lore.kernel.org/linux-trace-kernel/20230529044002.0481452b@rorschach.local.home

Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Daniel Bristot de Oliveira <bristot@redhat.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Acked-by: Daniel Bristot de Oliveira <bristot@kernel.org>

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