Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43 |
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014f3272 |
| 27-Jul-2023 |
Rohit Agarwal <quic_rohiagar@quicinc.com> |
dt-bindings: qcom: Update RPMHPD entries for some SoCs
Update the RPMHPD references with new bindings defined in rpmhpd.h for Qualcomm SoCs SM8[2345]50.
Signed-off-by: Rohit Agarwal <quic_rohiagar@
dt-bindings: qcom: Update RPMHPD entries for some SoCs
Update the RPMHPD references with new bindings defined in rpmhpd.h for Qualcomm SoCs SM8[2345]50.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1690461813-22564-1-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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dfe488d9 |
| 31-Jul-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
dt-bindings: clock: qcom,sm8350-videocc: Add SC8280XP
SC8280XP reuses the SM8350 video clock controller block, changing just a couple tunables. Docuemnt it.
Acked-by: Krzysztof Kozlowski <krzysztof
dt-bindings: clock: qcom,sm8350-videocc: Add SC8280XP
SC8280XP reuses the SM8350 video clock controller block, changing just a couple tunables. Docuemnt it.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8280_videocc-v2-1-c88269806269@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3 |
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#
2aae5eaa |
| 20-Apr-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
dt-bindings: clock: Add SM8350 VIDEOCC
SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it.
The binding was separated as the driver, u
dt-bindings: clock: Add SM8350 VIDEOCC
SM8350, like most recent higher-end chips has a separate clock controller block just for the Venus IP. Document it.
The binding was separated as the driver, unlike the earlier ones, doesn't expect clock-names to keep it easier to maintain.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-1-86c714a66a81@linaro.org
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